a7001ag NXP Semiconductors, a7001ag Datasheet

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a7001ag

Manufacturer Part Number
a7001ag
Description
A7001ag Secure Authentication Microcontroller
Manufacturer
NXP Semiconductors
Datasheet
1. General description
1.1 Overview
The A7001AG is a tamper resistant secure Micro Controller Unit (MCU) using a dedicated
security hardened MX51CPU. NXP Semiconductors has a long track record in security
MCUs. NXP ICs had been used in all kind of security applications like bank cards, health
insurance cards, electronic passports, pay-tv cards or as embedded secure element in
mobile phones. The A7001AG features a significantly enhanced secure microcontroller
architecture. Extended instructions for Java and C code, linear addressing and high speed
at low power are among many other improvements added to the classic 80C51 core
architecture.
The A7001AG supports the following features:
The A7001AG runs a Java Card Open Platform operating system called JCOP based on
independent, third party specifications, i.e. by Oracle, the Global Platform consortium, the
International Organization for Standards (ISO), EMV (Europay, MasterCard and VISA)
and others.
A7001AG
Secure authentication microcontroller
Rev. 1.1 — 18 March 2011
202011
100 kbit/s I
NXP patented glue logic
NXP secure fetch technology
Active shielding technology
Asynchronous self-timed Handshake Technology
Dedicated MX51 security CPU
72 KB EEPROM for application-code and data
50 μA typical sleep mode current with I
obstructing the bus lines
High-performance secured Public Key Infrastructure (PKI) coprocessor (RSA up to
2048 bit keys, ECC over GF(p) up to 320 bit keys)
Secured 2-key/3-key triple-DES coprocessor
Secured AES coprocessor (128-,192- and 256 bit keys)
EEPROM with minimum 500 000 cycles endurance and minimum 25 years retention
time
On-chip operating system firmware: JCOP 2.4.2 R1
Compliant to Java Card specification V3.0.1 classic as defined in
Compliant to Global Platform specification as defined in
2
C slave interface
TM
TM
2
C pads operated in weak pull-up mode, don’t
Preliminary short data sheet
Ref. 2
and
COMPANY PUBLIC
Ref. 1
Ref. 3

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a7001ag Summary of contents

Page 1

... General description 1.1 Overview The A7001AG is a tamper resistant secure Micro Controller Unit (MCU) using a dedicated security hardened MX51CPU. NXP Semiconductors has a long track record in security MCUs. NXP ICs had been used in all kind of security applications like bank cards, health insurance cards, electronic passports, pay-tv cards or as embedded secure element in mobile phones ...

Page 2

... Java layer. Also, this User manual contains the information on how to order A7001AG products. The Hardware data sheet explains the details of the A7001AG product from a hardware point of view. It outlines figures like pinning diagram and power consumption. 1.2 JCOPX - Additional Application Programming Interface (APIs) features JCOP provides extended support for several industry specific requirements ...

Page 3

... The A7001AG security concept includes dedicated HW measures to protect against any kind of leakage attacks. The Triple-DES coprocessor is mathematically proven leak-resistance to 1st order DPA, thus equally well resilient against all kinds of leakage attacks ...

Page 4

... Preliminary short data sheet COMPANY PUBLIC 2 C slave interface 2 C communication request 2 C pads operated in weak pull-up mode, don’t All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 18 March 2011 202011 A7001AG Secure authentication microcontroller © NXP B.V. 2011. All rights reserved ...

Page 5

... ICs that feature the industry standard I In addition to the A7001AG secure MCU, the total solution includes MCU firmware and an X.509 certificate authentication application. The A7001AG is delivered with pre-programmed, die-specific keys and certificates which are being generated and programmed in a certified (Common Criteria) secure NXP internal environment with master keys securely stored in HSMs (Hardware Secure Modules) ...

Page 6

... HVQFN32 5.1 Ordering options The following sections describe information how to order samples and final products. 5.1.1 Ordering A7001AG samples Samples in HVQFN32 package can be ordered from NXP Semiconductors. Note that NXP Semiconductors can provide pcs free of charge. Larger quantities have to be ordered separately. Valid NDA has place before samples are shipped. ...

Page 7

... TRIPLE-DES HARDWARE COPROCESSOR COPROCESSOR LAYER PLATFORM A7001 (1) For more details see Ref. 4 (2) For more details see Ref. 5 Fig 1. A7001AG block diagram A7001AG_SDS Preliminary short data sheet COMPANY PUBLIC APPLET 1 APPLET 2 INSTALLER EXTENSIONS (JAVA CARD 3.0.1 CLASSIC APIs) SYSTEM CLASSES APPLET TRANSACTION ...

Page 8

... Reset input, active LOW 23 not connected 24 Supply voltage not connected All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 18 March 2011 202011 A7001AG Secure authentication microcontroller 24 VDD 23 n.c. 22 RST_N 21 n.c. A7001AG 20 n.c. 19 n.c. 18 PVDD 17 n.c. 001aan709 © NXP B.V. 2011. All rights reserved ...

Page 9

... Requires connection via pull-up resistor to VDD 7 Reset input, active LOW 8 Supply voltage All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 18 March 2011 202011 A7001AG Secure authentication microcontroller 8 VDD 7 RST_N A7001AG 6 PVDD 5 n.c. 001aan710 © NXP B.V. 2011. All rights reserved ...

Page 10

... VDD, VSS, CLK, RST_N, IO1, IO2, IO3 pads LA, LB total power dissipation storage temperature shows a typical application diagram. It shows how the pins of the A7001AG shall All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 18 March 2011 202011 A7001AG Secure authentication microcontroller ...

Page 11

... System overview supporting Power-on Reset All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 18 March 2011 202011 A7001AG Secure authentication microcontroller PU 10 kΩ 10 kΩ VDD VSS PVDD RST_N SDA A7001AG © NXP B.V. 2011. All rights reserved. SCL 001aan711 ...

Page 12

... Technology for Smart Cards, Zhiqun Chen, ISBN 0-201-70329 Protocol Specification, Rev. 2.0 — Aug-04-2010, NXP Semiconductors All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 18 March 2011 202011 A7001AG Secure authentication microcontroller © NXP B.V. 2011. All rights reserved ...

Page 13

... NXP Semiconductors 13. Revision history Table 8. Revision history Document ID Release date A7001AG_SDS v.1.1 20110318 • Modifications: Product naming updated A7001AG_SDS v.1.0 20110211 • Modifications: Initial version- A7001AG_SDS Preliminary short data sheet COMPANY PUBLIC Data sheet status Preliminary short data sheet - Preliminary short data sheet - All information provided in this document is subject to legal disclaimers. Rev. 1.1 — ...

Page 14

... Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 18 March 2011 202011 A7001AG Secure authentication microcontroller © NXP B.V. 2011. All rights reserved ...

Page 15

... C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 18 March 2011 202011 A7001AG Secure authentication microcontroller NXP ICs containing functionality implementing countermeasures to Differential Power Analysis and Simple Power Analysis are produced and sold under applicable license from Cryptography Research, Inc ...

Page 16

... NXP Semiconductors 16. Tables Table 1. Quick reference data . . . . . . . . . . . . . . . . . . . . .5 Table 2. Ordering information . . . . . . . . . . . . . . . . . . . . .6 Table 3. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .8 Table 4. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .9 17. Figures Fig 1. A7001AG block diagram . . . . . . . . . . . . . . . . . . . .7 Fig 2. Pin configuration HVQFN32 (SOT617-3 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 1.1 Overview 1.2 JCOPX - Additional Application Programming Interface (APIs) features 1.3 Security features ...

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