ir3092 International Rectifier Corp., ir3092 Datasheet - Page 10

• Manufacturer Part Number: ir3092
• Description: 2 Phase Opteron, Athlon, Or Vr10.x Control Ic
• Manufacturer: International Rectifier Corp.

PWM Operation
The IR3092 is a fully integrated 2 phase interleaved PWM control IC which uses voltage mode control with trailing edge
modulation. A high-gain wide-bandwidth voltage type Error Amplifier in the control IC is used for the voltage control loop.
The PWM block diagram of the IR3092 is shown in Figure 2.
Refer to Figure 3. Upon receiving a clock pulse, the RSFF is set, the internal PWM ramp voltage begins to increase, the
low side driver is turned off, and the high side driver is then turned on. For phase 1, an internal 10pf capacitor is charged
by a current source that’s proportional to the switching frequency resulting in a ramp rate of 57mV per percent duty cycle.
For example, if the steady-state operating switch node duty cycle is 10%, then the internal ramp amplitude is typically
570mV from the starting point (or floor) to the crossing of the EAOUT control voltage. When the PWM ramp voltage
exceeds the Error Amplifier’s output voltage, the RSFF is reset. This turns off the high side driver, turns on the low side
driver, and discharges the PWM ramp to 0.7V until the next clock pulse.
IR3092 THEORY OF OPERATION
VCC
LGND
SETBIAS
BIASOUT
5VUVL
PWRGD
OCSET
SS
ENABLE
VID_SEL
3.4V
1.2V
3V
AMD=1.5V
INTEL=0.6V
+
-
+
-
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4 X IROSC
4V
IROSC
60K
15k
VOSNS-
5.5U
-
+
+
-
OVER CURRENT
55U
240mV chrg, 210mV dischrg
OFF
3.3V
110K
0.26V
4.9V
5V
45U
-
+
-
+
DELAY
Discharge Comparator
4.300V START
4.125V STOP
VID0
-
+
1
UVL
ON
VID1
1.9us
BLANKING
18uA
7.8V START
7.3V STOP
-
+
UVL
VID2
DAC DEFAULTS TO VR10
WITH VID_SEL GROUNDED
F11111
ATHLON_DAC
OPTERON_DAC
VID3
ON
IOVP
VID4
DAC
FAULT LATCH
45k
SET DOMINANT
VID5
S
R
OUT
OVP
OVP Comparator
Figure 1 – IR3092 Block Diagram
AMD=450mV
INTEL=150mV
VOSNS-
FAST DAC
IROSC
1.243
+
ROSC
-
0.7V
EQUAL DUTY CY CLE COMPARATOR
+
-
-
+
DAC BUFFER
1.3V
VDAC
+
-
FB
Sof tStart_Clamp
IROSC
BB DISABLE COMPARATOR
80mV
+
-
Oscillator
VDAC
IROSC
H FORCES IROSC/2 AT SS<0.7V
CLK1
CLK2
FB
PWM COMPARATOR
+
-
IROSC
PWM COMPARATOR
+
+
-
Error_Amp
+
-
DISABLE
0 TO IROSC*3/4
0.55V
EAOUT
0% DUTY CYCLE
10p
RSFF
RESET DOMINANT
+
-
RSFF
10p
S
R
RESET DOMINANT
0.7V
IROSC
QB
S
R
Q
IROSC/2
QB
Q
0.7V
Share Adjust Error Amp
U18
+
-
06/25/04
GateHI
GateLO
IN
OL_IN
OL_IN
IN
GateHI
GateLO
IN
OL_IN
OL_IN
IN
summer
summer
VDAC
VDAC
OL_OUT
OL_OUT
GATELO
GATEHI
VCCL
OL_OUT
OL_OUT
GATELO
GATEHI
IR3092
+
-
X25
X25
+
+
-
-
GATEHI1
GATEL1
GATEH2
VCCH1
VCCL
PGND1
CSINP1
CSINM
CSINP2
VDRP
SCOMP
VCCH2
GATEL2
PGND2