ir3092 International Rectifier Corp., ir3092 Datasheet - Page 21

• Manufacturer Part Number: ir3092
• Description: 2 Phase Opteron, Athlon, Or Vr10.x Control Ic
• Manufacturer: International Rectifier Corp.

Adaptive Voltage Positioning
Adaptive voltage positioning is needed to reduce output voltage deviations during load transients and power dissipation of
the load when it is drawing maximum current. The circuitry related to voltage positioning is shown in Figure 9. Resistor
R
current source whose value is programmed by the same external resistor that programs the oscillator frequency, R
pumps current out of the FB pin. The FB bias current develops a positioning voltage drop across R
converter’s output voltage lower to V(VDAC)-I(FB)* R
selected to program the desired amount of fixed offset voltage below the DAC voltage.
The voltage at the VDRP pin is an average of both phase Current Sense Amplifiers and represents the sum of the VDAC
voltage and the average inductor current of all the phases. The VDRP pin is connected to the FB pin through the resistor.
The Error Amplifier forces the voltage on the FB pin to equal VDAC through the power supply loop therefore the current
through RDRP is equal to (VDRP-VDAC) / R
which results in an increase R
voltage reduction proportional to an increase in load current. The droop impedance or output impedance of the converter
can thus be programmed by the resistor R
of the VDAC voltage.
AMD specifies the acceptable power supply regulation window as 50mV around their specified VID tables. VR10.X
specifies the VID table voltages as the absolute maximum power supply voltage. In order to have all three DAC options,
the OPTERON and ATHLON DAC output voltages are pre-positioned 50mV higher than listed in AMD specs. During
testing, a series resistor is placed between EAOUT and FB to cancel the additional 50mV out of the DAC. The FB bias
current, equal to IROSC, develops the 50mV cancellation voltage. Trimming the VDAC voltage by monitoring V(EAOUT)
with this 50mV cancellation resistor in circuit also trims out errors in the FB bias current.
The VDRP pin voltage represents the average current of the converter plus the DAC voltage. The load current can be
retrieved by subtracting the VDAC voltage from the VDRP voltage.
FB
is connected between the Error Amplifier’s inverting input pin FB and the converter’s output voltage. An internal
Page 21 of 37
CDAC
RDAC
IROSC
IDRP
+
RCOMP
CCOMP
- V(CSavg) +
VPOSITIONING
RDRP
RFB
FB
VDAC
VOSNS-
EAOUT
current, further positioning the output regulated voltage lower thus making the output
FB
VDRP
-
Figure 9 - Adaptive voltage positioning
VDAC
IROSC
VOUT SENSE+
VOUT SENSE-
DRP.
DRP.
VDRP BUFFER
The offset and slope of the converter output impedance are independent
+
ERROR AMPLIFIER
-
As the load current increases, the VDRP voltage increases accordingly
+
-
FB
to maintain a balance at the Error Amplifier inputs. R
VDAC
VDAC
X24.5
X24.5
+
+
-
-
CSINM3
CSINP3
CSINM2
CSINP2
06/25/04
FB
which forces the
IR3092
FB
ROSC
is
,