ir3092 International Rectifier Corp., ir3092 Datasheet - Page 15

• Manufacturer Part Number: ir3092
• Description: 2 Phase Opteron, Athlon, Or Vr10.x Control Ic
• Manufacturer: International Rectifier Corp.

VID Control
The IR3092 provides three different microprocessor solutions. The VID_SEL pin selects the appropriate Digital-to-Analog
Converters (DAC), VID threshold voltages, and Over Voltage Protection (OVP) threshold for VR10.X, OPTERON, or
ATHLON solutions. AMD VID codes are shown in Table 1; Intel VID codes are found in Table 2. The DAC output voltage
is available at the VDAC pin. A detailed block diagram of the VID control circuitry can be found in Figure 7. The VID pins
are internally pulled up to 4.9V by 18uA current sources. The VID input comparators have a 0.6V threshold for VR10.X or
1.5V threshold for OPTERON and ATHLON. The selected DAC voltage is provided at the Error Amplifier positive input
and to the VDAC pin by the trans-conductance DAC Buffer.
The VDAC voltage is trimmed to the Error Amplifier output voltage with EAOUT tied to FB via an accurate resistor. This
compensates DAC Buffer input offset, Error Amplifier input offset, and errors in the generation of the FB bias current
which is based on R
The IR3092 can accept changes in the VID code while operating and vary the VDAC voltage accordingly. The IR3092
detects a VID change and blanks the DAC output response for 400ns to verify the new code is valid and not due to skew
or noise. The sink/source capability of the VDAC buffer amp is programmed by the same external resistor that sets the
oscillator frequency, R
between VDAC pin and the VOSNS- pin. A resistor connected in series with this capacitor is required to compensate the
VDAC buffer amplifier. Digital VID transitions result in a smooth analog transition of the VDAC voltage and converter
output voltage minimizing inrush currents in the input and output capacitors and overshoot of the output voltage.
APPLICATIONS INFORMATION
GNDIN
VIN
RCOMP
RFB
Page 15 of 37
RDRP
CIN
CDAC
RDAC
CCOMP
POWERGOOD
CSS
ENABLE
RROSC
ROCSET
VID5
VID0
VID1
VID2
VID3
VID4
OVP
ROSC
CSC2
RSC2
ROSC
. This trim method provides 0.5% system accuracy.
Csense-
. The slew rate of the voltage at the VDAC pin can be adjusted by an external capacitor
RSET
VID3
VID4
ROSC
VOSNS-
OCSET
VDAC
VDRP
FB
EAOUT
SS/DEL
SCOMP
NC
CVCC
VIN
IR3092
48LD MLPQ
Figure 6 – System Diagram
GATEH1
GATEH2
GATEL1
GATEL2
PGND1
PGND2
VCCH2
5VUVL
VCCL
NC
NC
NC
CBIAS
CBST1
CBST2
VIN
1
RCS1
VIN
CCS1
1
2
RCS2
CCS2
2
06/25/04
COUT
IR3092
VOUT SENSE+
VOUT+
VOUT-
VOUT SENSE-