mcf51ac256 Freescale Semiconductor, Inc, mcf51ac256 Datasheet - Page 6

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mcf51ac256

Manufacturer Part Number
mcf51ac256
Description
Mcf51ac256 Coldfire Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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MCF51AC256 Family Configurations
1.3.1
6
32-bit Version 1 ColdFire® central processor unit (CPU)
— Up to 50.33 MHz at 2.7 V – 5.5 V
— Provide 0.94 Dhrystone 2.1 DMIPS per MHz performance when running from internal RAM (0.76 DMIPS per
— Implements instruction set revision C (ISA_C)
On-chip memory
— Up to 256 KBytes flash memory read/program/erase over full operating voltage and temperature
— Up to 32 KBytes static random access memory (SRAM)
— Security circuitry to prevent unauthorized access to SRAM and flash contents
Power-Saving Modes
— Three low-power stop plus wait modes
— Peripheral clock enable register can disable clocks to unused modules, reducing currents; allows clocks to remain
System protection features
— Watchdog computer operating properly (COP) reset
— Low-voltage detection with reset or interrupt
— Illegal opcode and illegal address detection with programmable reset or exception response
— Flash block protection
Debug support
— Single-wire background debug interface
— Real-time debug support, with 6 hardware breakpoints (4 PC, 1 address pair and 1 data) that can be configured
— On-chip trace buffer provides programmable start/stop recording conditions plus support for continuous or
— Support for real-time program (and optional partial data) trace using the debug visibility bus
V1 ColdFire interrupt controller (CF1_INTC)
— Support of 40 peripheral I/O interrupt requests plus seven software (one per level) interrupt requests
— Fixed association between interrupt request source and level plus priority, up to two requests can be remapped to
— Unique vector number for each interrupt source
— Support for service routine interrupt acknowledge (software IACK) read cycles for improved system performance
Multipurpose clock generator (MCG)
— Oscillator (XOSC); loop-control Pierce oscillator; crystal or ceramic resonator range of 31.25 kHz to 38.4 kHz or
— FLL/PLL controlled by internal or external reference
— Trimmable internal reference allows 0.2% resolution and 2% deviation
Analog-to-digital converter (ADC)
— 24 analog inputs with 12 bits resolution
— Output formatted in 12-, 10- or 8-bit right-justified format
— Single or continuous conversion (automatic return to idle after single conversion)
— Operation in low-power modes for lower noise operation
— Asynchronous clock source for lower noise operation
— Automatic compare with interrupt for less-than, or greater-than or equal-to, programmable value
— On-chip temperature sensor
MHz when running from flash)
enabled to specific peripherals in stop3 mode
into a 1- or 2-level trigger
PC-profiling modes
the highest maskable level + priority
1 MHz to 16 MHz
Feature List
MCF51AC256 ColdFire Microcontroller Data Sheet, Rev.1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor

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