mcf51jm128 Freescale Semiconductor, Inc, mcf51jm128 Datasheet - Page 6

• Manufacturer Part Number: mcf51jm128
• Description: Mcf51jm128 Coldfire Microcontroller Flexis 32-bit V1 Coldfire? Usb Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

MCF51JM128 Family Configurations
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— Up to 128 KBytes Flash memory with read/program/erase over full operating voltage and temperature range
— Up to 16 KBytes static random access memory (RAM)
— Security circuitry to prevent unauthorized access to RAM and flash contents
Power-saving modes
— Two low-power stop plus wait modes
— Peripheral clock enable register can disable clocks to unused modules, thereby reducing currents; this behavior
— Very lower power real-time counter for use in run, wait, and stop modes with internal and external clock sources
Four Clock Source Options
— Oscillator (XOSC) — Loop-control Pierce oscillator; crystal or ceramic resonator range of 31.25 kHz to 38.4 kHz
— FLL/PLL controlled by internal or external reference
— Trimmable internal reference allows 0.2% resolution and 2% deviation
System protection features
— Watchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal clock source
— Low-voltage detection with reset or interrupt; selectable trip points
— Illegal opcode and illegal address detection with programmable reset or exception response
— Flash block protection
Debug support
— Single-wire Background debug interface
— 4 Program Counters plus two address (optional data) breakpoint registers with programmable 1- or 2-level trigger
— 64-entry processor status and debug data trace buffer with programmable start/stop conditions
Universal Serial Bus (USB) On-The-Go dual-role controller
— Full-speed USB device controller
— Full-speed / low-speed host controller
— OTG protocol logic
— On-chip USB transceiver
— On-chip 3.3 V USB regulator and pull-up/down resistors save system cost
Controller area network (MSCAN)
— Implementation of the CAN protocol — Version 2.0A/B
— Five receive buffers with FIFO storage scheme
— Three transmit buffers with internal prioritization using a “local priority” concept
— Flexible maskable identifier filter programmable as 2x32-bit, 4x16-bit, or 8x8-bit
— Programmable wakeup functionality with integrated low-pass filter
— Programmable loopback mode supports self-test operation
— Programmable bus-off recovery functionality
— Internal timer for time-stamping of received and transmitted messages
Cryptographic acceleration unit (CAU)
— Co-processor support of DES, 3DES, AES, MD5, and SHA-1
allows clocks to remain enabled to specific perhipherals in Stop3 mode
or 1 MHz to 16 MHz
or bus clock
response
– Fully compliant with USB specification 1.1 and 2.0
– 16 bidirectional endpoints, with double buffering to provide the maximum throughput
– Supports control, bulk, interrupt, and isochronous endpoints
– Supports bus-powered capability with low-power consumption
– Host mode allows control, bulk, interrupt, and isochronous transfers
MCF51JM128 ColdFire Microcontroller, Rev. 0
Freescale Semiconductor