s29ns01gr Meet Spansion Inc., s29ns01gr Datasheet - Page 3

• Manufacturer Part Number: s29ns01gr
• Description: S29ns01gr 1gb 64 M X 16 Bit , 1.8 V Burst Simultaneous Read/write, Multiplexed Mirrorbit Flash Memory
• Manufacturer: Meet Spansion Inc.

Features
General Description
Performance Characteristics
This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in
this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice.
The Spansion S29NS01G/512/256/128R are MirrorBit
mode Flash devices are capable of performing simultaneous read and write operations with zero latency on two separate banks
using multiplexed data and address pins. These products can operate up to 104 MHz and use a single V
that makes them ideal for the demanding wireless applications of today that require higher density, better performance, and
lowered power consumption.
S29NS-R MirrorBit
S29NS01GR, S29NS512R, S29NS256R, S29NS128R
1024/512/256/128 Mb (64/32/16/8 M x 16 bit)
1.8 V Burst Simultaneous Read/Write,
Multiplexed MirrorBit
Data Sheet (Advance Information)
Speed Option (MHz)
Max. Synch. Latency, ns (t
Max. Synch. Burst Access, ns (t
Max. Asynch. Access Time, ns (t
Max OE# Access Time, ns (t
Continuous Burst Read @ 104 MHz
Simultaneous Operation @ 66 MHz
Program/Erase
Standby Mode
Single 1.8 V read/program/erase (1.70–1.95 V)
65 nm MirrorBit Technology
Multiplexed Data and Address for reduced I/O count
Simultaneous Read/Write operation
32-word Write Buffer
Sixteen-bank architecture
Four 32 KB sectors at the top of memory array, for NS256R
and NS128R
1024 128 KB sectors (NS01GR), 512 128 KB (NS512R), 255/
127 128 KB sectors (NS256/128R)
Programmable linear (8/16) with wrap around and continuous
burst read modes
Secured Silicon Sector region consisting of 128 words each
for factory and customer
10-year data retention (typical)
Cycling Endurance: 100,000 cycles per sector (typical)
Current Consumption (typical values)
IACC)
Read Access Times
OE
Publication Number S29NS-R_00
)
BACC)
ACC
)
®
Flash Memory
®
Flash Family
40 mA
66 mA
20 mA
20 µA
®
104
Flash products fabricated on 65 nm process technology. These burst
75
80
15
7
Revision 03
Single Word Programming
Effective Write Buffer Programming (V
Effective Write Buffer Programming (V
Sector Erase (16 Kword Sector)
Sector Erase (64 Kword Sector)
RDY output indicates data available to system
Command set compatible with JEDEC (42.4) standard
Hardware sector protection via V
Handshaking by monitoring RDY
Offered Packages
– NS01GR: Offered only as MCP or PoP
– NS512R: 64-ball FBGA (8 mm x 9.2 mm)
– NS256R/NS128R: 44-ball FBGA (6.2 mm x 7.7 mm)
Low V
Write operation status bits indicate program and erase
operation completion
Suspend and Resume commands for Program and Erase
operations
Asynchronous program operation, independent of burst
control register settings
V
Support for Common Flash Interface (CFI)
PP
input pin to reduce factory programming time
CC
write inhibit
Issue Date May 9, 2008
Typical Program & Erase Times
CC
PP
) Per Word
) Per Word
PP
pin
CC
of 1.7 V to 1.95 V
350 ms
800 ms
170 µs
9.4 µs
4.8 µs