s908gr16ag4cfj Freescale Semiconductor, Inc, s908gr16ag4cfj Datasheet - Page 133

• Manufacturer Part Number: s908gr16ag4cfj
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

If the stop enable bit, STOP, in the CONFIG1 register is a 0, the STOP instruction causes an illegal
opcode reset.
13.2.3.5 Illegal Address Reset
An illegal address reset is an internal reset caused by opcode fetch from an unmapped address. An illegal
address reset sets the ILAD bit in the SIM reset status register.
A data fetch from an unmapped address does not generate a reset.
13.2.4 System Integration Module (SIM) Reset Status Register
This read-only register contains flags to show reset sources. All flag bits are automatically cleared
following a read of the register. Reset service can read the SIM reset status register to clear the register
after power-on reset and to determine the source of any subsequent reset.
The register is initialized on power-up as shown with the POR bit set and all other bits cleared. During a
POR or any other internal reset, the RST pin is pulled low. After the pin is released, it will be sampled 32
CGMXCLK cycles later. If the pin is not above a V
in addition to whatever other bits are set.
POR — Power-On Reset Flag
PIN — External Reset Flag
COP — Computer Operating Properly Reset Bit
ILOP — Illegal Opcode Reset Bit
ILAD — Illegal Address Reset Bit
Freescale Semiconductor
1 = Power-on reset since last read of SRSR
0 = Read of SRSR since last power-on reset
1 = External reset via RST pin since last read of SRSR
0 = POR or read of SRSR since any reset
1 = Last reset caused by timeout of COP counter
0 = POR or read of SRSR since any reset
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR since any reset
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR since any reset
Address:
Only a read of the SIM reset status register clears all reset flags. After
multiple resets from different sources without reading the register, multiple
flags remain set.
Read:
Write:
POR:
$FE01
POR
Bit 7
1
Figure 13-2. SIM Reset Status Register (SRSR)
= Unimplemented
PIN
6
0
MC68HC908GR16A Data Sheet, Rev. 1.0
COP
5
0
NOTE
IH
ILOP
4
0
at that time, then the PIN bit in the SRSR may be set
ILAD
3
0
MODRST
2
0
LVI
1
0
Bit 0
0
0
Resets
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