s908az32ag2cfue Freescale Semiconductor, Inc, s908az32ag2cfue Datasheet - Page 98

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s908az32ag2cfue

Manufacturer Part Number
s908az32ag2cfue
Description
M68hc08 Microcontrollers 8-bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Clock Generator Module (CGM)
The series resistor (R
crystals. Refer to the crystal manufacturer’s data for more information.
Figure 8-3
Routing should be done with great care to minimize signal cross talk and noise. (See
Time Specifications
effects on PLL performance).
8.4 I/O Signals
The following paragraphs describe the CGM input/output (I/O) signals.
8.4.1 Crystal Amplifier Input Pin (OSC1)
The OSC1 pin is an input to the crystal oscillator amplifier.
8.4.2 Crystal Amplifier Output Pin (OSC2)
The OSC2 pin is the output of the crystal oscillator inverting amplifier.
8.4.3 External Filter Capacitor Pin (CGMXFC)
The CGMXFC pin is required by the loop filter to filter out phase corrections. A small external capacitor is
connected to this pin.
8.4.4 Analog Power Pin (V
V
potential as the V
8.4.5 Oscillator Enable Signal (SIMOSCEN)
The SIMOSCEN signal enables the oscillator and PLL.
8.4.6 Crystal Output Frequency Signal (CGMXCLK)
CGMXCLK is the crystal oscillator output signal. It runs at the full speed of the crystal (f
comes directly from the crystal oscillator circuit.
to OSC1 and OSC2 and may not represent the actual circuitry. The duty cycle of CGMXCLK is unknown
and may depend on the crystal and other external factors. Also, the frequency and amplitude of
CGMXCLK can be unstable at startup.
98
DDA
is a power pin used by the analog portions of the PLL. Connect the V
Bypass capacitor, C
Filter capacitor, C
also shows the external components for the PLL:
To prevent noise problems, C
pin as possible with minimum routing distances and no routing of other
signals across the C
Route V
capacitors as close as possible to the package.
DD
for routing information and more information on the filter capacitor’s value and its
pin.
S
) may not be required for all ranges of operation, especially with high-frequency
DDA
F
BYP
carefully for maximum noise immunity and place bypass
DDA
F
)
MC68HC908AZ32A Data Sheet, Rev. 2
connection.
F
should be placed as close to the CGMXFC
Figure 8-3
NOTE
NOTE
shows only the logical relation of CGMXCLK
DDA
pin to the same voltage
Freescale Semiconductor
8.9 Acquisition/Lock
CGMXCLK
) and

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