74lv174db NXP Semiconductors, 74lv174db Datasheet - Page 7

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74lv174db

Manufacturer Part Number
74lv174db
Description
Hex D-type Flip-flop With Reset; Positive-edge Trigger
Manufacturer
NXP Semiconductors
Datasheet
1. Unless otherwise stated, all typical values are at T
2. Typical value measured at V
3. Typical value measured at V
Philips Semiconductors
AC CHARACTERISTICS (Continued)
GND = 0V; t
NOTES:
AC WAVEFORMS
V
V
V
output load.
Figure 1. The clock (CP) to output (Q
1998 May 20
SYMBOL
M
M
OL
Q
clock pulse width, and the maximum clock pulse frequency.
Hex D-type flip-flop with reset; positive edge-trigger
n
= 1.5V at V
= 0.5V * V
CP INPUT
f
f
and V
max
OUTPUT
t
h
GND
V
V
OH
OL
V
OH
I
r
= t
are the typical output voltage drop that occur with the
CC
Hold time
Hold time
D
D
Maximum clock
pulse frequency
CC
f
n
n
= 2.5ns; C
at V
PARAMETER
to CP
to CP
w 2.7V v 3.6V
V
M
CC
t
PHL
t 2.7V and w 4.5V
t
w
L
= 50pF; R
V
1/f
M
CC
CC
max
= 3.3V.
= 5.0V.
WAVEFORM
L
n
= 1K
Figure 3
Figure 1
Figure 1
) propagation delays, the
t
PLH
amb
= 25 C.
SV00351
CONDITION
3.0 to 3.6
4.5 to 5.5
3.0 to 3.6
4.5 to 5.5
V
CC
1.2
2.0
2.7
2.0
2.7
(V)
7
Figure 2. The master reset (MR) pulse width, the master reset
to output (Q
Q
MR INPUT
n
CP INPUT
OUTPUT
GND
GND
V
V
OH
OL
Vi
Vi
MIN
14
19
24
36
n
5
5
5
5
) propagation delay and the master reset to clock
–40 to +85 C
LIMITS
V
TYP
100
M
–10
–2
–1
70
–4
–2
40
58
2
3
2
t
3
PHL
1
removal time.
t
w
MAX
V
M
–40 to +125 C
MIN
12
16
20
30
5
5
5
5
LIMITS
V
t
M
Product specification
rem
MAX
74LV174
SV00352
UNIT
MHz
MHz
ns

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