ad8318acpz-wp Analog Devices, Inc., ad8318acpz-wp Datasheet - Page 19

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ad8318acpz-wp

Manufacturer Part Number
ad8318acpz-wp
Description
1 Mhz To 8 Ghz, 70 Db Logarithmic Detector/controller
Manufacturer
Analog Devices, Inc.
Datasheet
In many log amp applications, it may be necessary to lower the
corner frequency of the postdemodulation filtering to achieve
low output ripple while maintaining a rapid response time to
changes in signal level. For an example of a 4-pole active filter,
see the
CONTROLLER MODE
The AD8318 provides a controller mode feature at the VOUT
pin. Using V
AD8318 to control subsystems, such as power amplifiers (PAs),
variable gain amplifiers (VGAs), or variable voltage attenuators
(VVAs) that have output power that increases monotonically
with respect to their gain control signal.
To operate in controller mode, the link between VSET and
VOUT is broken. A setpoint voltage is applied to the VSET
input; VOUT is connected to the gain control terminal of the
VGA, and the detector RF input is connected to the output of
the VGA (usually using a directional coupler and some
additional attenuation). Based on the defined relationship
between V
measurement mode, the AD8318 adjusts the voltage on VOUT
(VOUT is now an error amplifier output) until the level at the
RF input corresponds to the applied V
When the AD8318 operates in controller mode, there is no
defined relationship between V
to a value that results in the correct input signal level appearing
at INHI/INLO.
In order for this output power control loop to be stable, a
ground-referenced capacitor is connected to the CLPF pin.
This capacitor, C
current) to set the loop bandwidth and ensure loop stability. For
further details on control loop dynamics, refer to the
data sheet.
Decreasing V
signal from the VGA, tends to increase V
voltage of the VGA must have a positive sense. A positive
control voltage to the VGA increases the gain of the device.
AD8307
OUT
ATTENUATOR
SET
DIRECTIONAL
SET
and the RF input signal when the device is in
for the setpoint voltage, it is possible for the
, which corresponds to demanding a higher
data sheet.
COUPLER
FLT
Figure 42. AD8318 Controller Mode
, integrates the error signal (in the form of a
52.3Ω
1nF
1nF
INHI
INLO
SET
AD8318
VGA/VVA
and V
VOUT
CLPF
GAIN
CONTROL
VOLTAGE
SET
VSET
C
FLT
OUT
.
OUT
voltage; V
. The gain control
RFIN
DAC
AD8315
OUT
settles
Rev. B | Page 19 of 24
The basic connections for operating the AD8318 as an analog
controller with the AD8367 are shown in Figure 43. The
AD8367
dynamic range. This configuration is very similar to the one
shown in Figure 42. For applications working at high input
frequencies, such as cellular bands or WLAN, or those
requiring large gain control ranges, the AD8318 can control
the 10 MHz to 3 GHz
and an application schematic, refer to the
The voltage applied to the GAIN pin controls the gain of the
AD8367. This voltage, V
of 20 mV/dB and runs from 50 mV at −2.5 dB of gain up to
1.0 V at +42.5 dB.
The incoming RF signal to the
level. Receiving and demodulating it with the lowest possible
error requires that the signal levels be optimized for the highest
signal-to-noise ratio (SNR) feeding into the analog-to-digital
converters (ADC). This is done by using an automatic gain
control (AGC) loop. In Figure 43, the voltage output of the
AD8318 modifies the gain of the
RF signal produces an output voltage that is equal to the
setpoint voltage V
The AGC loop is capable of controlling signals over ~45 dB
dynamic range. The output of the AD8367 is designed to drive
loads ≥ 200 Ω. As a result, it is not necessary to use the 53.6 Ω
resistor at the input of the AD8318; the nominal input imped-
ance of 2 kΩ is sufficient.
If the AD8367 output drives a 50 Ω load, such as an oscilloscope
or spectrum analyzer, use a simple resistive divider network.
The divider used in Figure 43 has an insertion loss of 11.5 dB.
Figure 44 shows the transfer function of output power vs. V
voltage for a 100 MHz sine wave at −40 dBm into the AD8367.
Figure 43. AD8318 Operating in Controller Mode to Provide Automatic Gain
RF INPUT SIGNAL
is a low frequency to 500 MHz VGA with 45 dB of
DAC
Control Functionality in Combination with the AD8367
SETPOINT
VOLTAGE
100pF
+V
C
SET
FLT
SET
261Ω
R2
.
INPT
VSET
CLPF
VOUT
GAIN
ADL5330
AD8318
R1
1kΩ
GAIN
GND
VPOS GND
+3V
AD8367
VGA
VPOS
, is scaled linear-in-dB with a slope
+5V
INLO
INHI
AD8367
HPFL
RF VGA. For further details
VOUT
AD8367
R
100Ω
C
100pF
HP
1nF
1nF
HP
0.1µF
has a varying amplitude
ADL5330
until the incoming
57.6Ω
174Ω
100MHz
BANDPASS
FILTER
RF OUTPUT SIGNAL
AD8318
data sheet.
SET

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