pcf85102c-2 NXP Semiconductors, pcf85102c-2 Datasheet
pcf85102c-2
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pcf85102c-2 Summary of contents
Page 1
... Rev. 04 — 22 October 2004 1. Description The PCF85102C floating gate Electrically Erasable Programmable Read Only Memory (EEPROM) with 2 kbits (256 internal redundant storage code fault tolerant to single bit errors. This feature dramatically increases the reliability compared to conventional EEPROMs. Power consumption is low due to the full CMOS technology used ...
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... V DD Ordering information Package Name Description DIP8 plastic dual in-line package; 8 leads (300 mil) SO8 plastic small outline package 8 leads (straight); body width 3.9 mm Ordering options Topside mark PCF85102C2 85102C2 Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface Min Typ Max Unit 2 ...
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... PCF85102C-2 6 SCL INPUT 5 FILTER SDA n ADDRESS SHIFT SWITCH REGISTER TEST MODE DECODER POWER-ON-RESET Fig 1. Block diagram C-BUS CONTROL LOGIC ADDRESS BYTE HIGH COUNTER REGISTER ...
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... The Most Significant Bit (MSB) ‘b7’ is sent first. A2, A1, A0 are hardware selectable pins. A system could have up to eight PCF85102C-2 devices on the same I equivalent kbit EEPROM or 8 pages of 256 bytes of memory. The eight addresses are defined by the state of the A0, A1, A2 inputs (logic level ‘1’ ...
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... C-BUS 256-BYTE PAGE PCF85102C-2 DEVICE 2 256-BYTE PAGE PCF85102C-2 DEVICE 3 256-BYTE PAGE PCF85102C-2 DEVICE 4 256-BYTE PAGE PCF85102C-2 DEVICE 5 256-BYTE PAGE PCF85102C-2 DEVICE 6 256-BYTE PAGE PCF85102C-2 DEVICE 7 256-BYTE PAGE PCF85102C-2 DEVICE 8 256-BYTE PAGE 002aaa249 Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface ...
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... Data transfer is unlimited in the read mode. The information is transmitted in bytes and each receiver acknowledges with a ninth bit. Within the I fast-speed mode (400 kHz clock rate) are defined. The PCF85102C-2 operates in only the standard-speed mode. By definition, a device that sends a signal is called a ‘transmitter’, and the device which receives the signal is called a ‘ ...
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... Byte/word write: address field. This address field is a word address providing access to the 256 words of memory. Upon receipt of the word address, the PCF85102C-2 responds with an acknowledge and awaits the next eight bits of data, again responding with an acknowledge. Word address is automatically incremented. The master can now terminate the transfer by generating a STOP condition or transmit up to six more bytes of data and then terminate by generating a STOP condition ...
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... Fig 5. Auto-increment memory word address; two byte write. Page write: initiated in the same manner as the byte write operation. The master can transit eight data bytes within one transmission. After receipt of each byte, the PCF85102C-2 will respond with an acknowledge. The typical E/W time in this mode ...
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... S SLAVE ADDRESS 0 A R/W Fig 7. Master reads PCF85102C-2 slave after setting word address (write word address; read data); sequential read. S SLAVE ADDRESS Fig 8. Master reads PCF85102C-2 immediately after first byte (read mode); current address read. 9397 750 14216 Product data ...
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... 0.8 0. 0 DD(min amb Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface Max Unit +6 +150 C +85 C Typ Max Unit - 6 200 0.3V ...
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... Fig 9. Timing requirements for the I 9397 750 14216 Product data 256 8-bit CMOS EEPROM with see Figure 9. DD Conditions repeated start HIGH HD;DAT SU;DAT 2 C-bus. Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface IL Min Max 0 100 4.7 4.0 4.7 4.0 4.7 5 [1] 0 250 1 300 4.0 t HD;STA ...
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... E/W 9397 750 14216 Product data 256 8-bit CMOS EEPROM with I Conditions internal oscillator external clock +85 C amb amb Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface Min Typ Max 100000 1000000 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. ...
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... 0.53 1.07 0.36 9.8 6.48 2.54 0.38 0.89 0.23 9.2 6.20 0.021 0.042 0.014 0.39 0.26 0.1 0.015 0.035 0.009 0.36 0.24 REFERENCES JEDEC JEITA MO-001 SC-504-8 Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface 3.60 8.25 10.0 7.62 0.254 3.05 7.80 8.3 0.14 0.32 0.39 0.3 0.01 0.12 0.31 0.33 EUROPEAN ISSUE DATE PROJECTION 99-12-27 03-02-13 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. ...
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... 0.49 0.25 5.0 4.0 6.2 1.27 0.36 0.19 4.8 3.8 5.8 0.019 0.0100 0.20 0.16 0.244 0.05 0.041 0.014 0.0075 0.19 0.15 0.228 REFERENCES JEDEC JEITA MS-012 Rev. 04 — 22 October 2004 PCF85102C-2 2 8-bit CMOS EEPROM with I C-bus interface detail 1.0 0.7 1.05 0.25 0.25 0.1 0.4 0.6 0.039 0.028 ...
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... C (SnPb process) or below 245 C (Pb-free process) – for all the BGA and SSOP-T packages 9397 750 14216 Product data 256 8-bit CMOS EEPROM with I Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface ). stg(max) © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...
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... Product data 256 2.5 mm thick/large packages. parallel to the transport direction of the printed-circuit board; transport direction of the printed-circuit board. Rev. 04 — 22 October 2004 PCF85102C-2 2 8-bit CMOS EEPROM with I C-bus interface 3 350 called small/thin packages. © Koninklijke Philips Electronics N.V. 2004. All rights reserved. ...
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... DHVQFN, HBCC, HBGA, not suitable HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS [7] PLCC , SO, SOJ suitable LQFP, QFP, TQFP not recommended SSOP, TSSOP, VSO, not recommended VSSOP Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface [2] Reflow Dipping [3] suitable not suitable suitable [6] suitable suitable [7][8] ...
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... Product data (9397 750 09641); second version; supersedes data in data sheet PCF85102C-2; PCF85103C-2 dated 2000 Feb 15 (9397 750 06682). ECN 853-2341 28170 dated 09 May 2002. Product data; initial version (as PCF85102C-2; PCF85103C-2 , 9397 750 06682). 01 20000215 - 9397 750 14216 Product data ...
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... Licenses Purchase of Philips I Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface 2 C components 2 Purchase of Philips I ...
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... Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 22 October 2004 Document order number: 9397 750 14216 PCF85102C-2 256 8-bit CMOS EEPROM with I 2 C-bus interface ...