pca8802 NXP Semiconductors, pca8802 Datasheet - Page 11

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pca8802

Manufacturer Part Number
pca8802
Description
Smartcard Rtc; Ultra Low Power Oscillator With Integrated Counter For Initiating One Time Password Generation
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
PCA8802_1
Product data sheet
9.5.6 Acknowledge
9.5.7 Data transfer
The number of data bytes transferred between the START and STOP conditions from
transmitter to receiver is unlimited, but the duration of the access must not exceed
32 seconds. Each byte of eight bits is followed by an acknowledge bit. The acknowledge
bit is a HIGH level signal put on the bus by the transmitter during which time the master
generates an extra acknowledge related clock pulse. A slave receiver which is addressed
must generate an acknowledge after the reception of each byte. Also a master receiver
must generate an acknowledge after the reception of each byte that has been clocked out
of the slave transmitter. The device that acknowledges must pull-down the SDA line during
the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period
of the acknowledge related clock pulse (set-up and hold times must be taken into
consideration). A master receiver must signal an end of data to the transmitter by not
generating an acknowledge on the last byte that has been clocked out of the slave. In this
event the transmitter must leave the data line HIGH to enable the master to generate a
STOP condition. Acknowledgement is shown in
Fig 16. Acknowledgement on the I
Fig 17. A complete data transfer
SDA
SCL
condition
START
by transmitter
data output
S
by receiver
data output
SCL from
master
1 to 7
ADDRESS
condition
START
Rev. 01 — 19 February 2009
S
8
ACK
9
1
2
C-bus
1 to 7
DATA
2
8
Figure
ACK
9
16.
not acknowledge
acknowledge
1 to 7
DATA
8
acknowledgement
clock pulse for
PCA8802
8
© NXP B.V. 2009. All rights reserved.
Smartcard RTC
9
ACK
9
mbc602
condition
001aaj201
STOP
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P

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