adc1213d125hn/c1 NXP Semiconductors, adc1213d125hn/c1 Datasheet - Page 6

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adc1213d125hn/c1

Manufacturer Part Number
adc1213d125hn/c1
Description
Dual 12-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 5.
ADC1213D_SER_5
Preliminary data sheet
Symbol
I
P
P
Digital inputs
Clock inputs: pins CLKP and CLKM, AC coupled
LVPECL
V
LVDS
V
SINE wave
V
LVCMOS mode
V
V
Logic inputs, Power-down: pins CFG0 to CFG3, SCRAMBLER, SWING_0, and SWING_1
V
V
I
I
SPI: pins CS, SDIO/DCS, and SCLK/DCS
V
V
I
I
C
DDD
IL
IH
IL
IH
tot
i(clk)dif
i(clk)dif
i(clk)dif
IL
IH
IL
IH
IL
IH
I
Characteristics
Parameter
digital supply current
total power dissipation
power dissipation
differential clock input
voltage
differential clock input
voltage
differential clock input
voltage
LOW-level input voltage
HIGH-level input voltage
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
input capacitance
[1]
…continued
Conditions
f
f
f
f
f
f
power-down mode
standby mode
peak-to-peak
peak-to-peak
peak-to-peak
All information provided in this document is subject to legal disclaimers.
clk
i
clk
clk
clk
clk
= 70 MHz
= 65 Msps
= 125 Msps;
= 125 Msps
= 105 Msps
= 80 Msps
Rev. 05 — 23 April 2010
Min
-
-
-
-
-
-
-
-
-
±0.8
-
0.7V
-
-
−6
−30
0
0.7V
−10
−50
-
DDA
DDA
ADC1213D series
Typ
150
1270
1150
995
885
30
200
±0.8
±0.4
±1.5
-
-
0
0.66V
-
-
-
-
-
-
4
DDD
Max
-
-
-
-
-
-
-
-
-
-
0.3V
-
-
-
+6
+30
0.3V
V
+10
+50
-
DDA
ADC1213D series
© NXP B.V. 2010. All rights reserved.
DDA
DDA
Unit
mA
mW
mW
mW
mW
mW
mW
V
V
V
V
V
V
V
μA
μA
V
V
μA
μA
pF
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