tda8933t-n1 NXP Semiconductors, tda8933t-n1 Datasheet - Page 28
tda8933t-n1
Manufacturer Part Number
tda8933t-n1
Description
Tda8933 Class-d Audio Amplifier
Manufacturer
NXP Semiconductors
Datasheet
1.TDA8933T-N1.pdf
(47 pages)
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NXP Semiconductors
TDA8933_1
Preliminary data sheet
14.6 Device synchronization
Where:
Example:
Substituting R1 = R2 = 4.7 k , Z
results in a gain of G
If two or more TDA8933 devices are used in one application it is recommended that all
devices are synchronized at the same switching frequency to avoid beat tones.
Synchronization can be realized by connecting all OSCIO pins together and configuring
one of the TDA8933 devices as master, while the other TDA8933 devices are configured
as slaves (see
A device is configured as master when a resistor R
and pin V
configured as an oscillator output for synchronization. The OSCREF pins of the slave
devices should be shorted to pin V
R
Fig 10. Master/slave concept in two-chip application
EQ
R1 = series resistors (
R2 = series resistors (
R
R3 = parallel resistor (
Z
i
EQ
= internal input impedance (
=
= equivalent resistance (
----------------- -
R3
R3
SSD(HW)
+
Z
Z
i
i
Figure
100 nF
, setting the carrier frequency. Pin OSCIO of the master is then
C osc
v(tot)
master
10).
OSCREF
Rev. 01 — 15 May 2007
= 26.3 dB.
R osc
39 k
TDA8933
V
SSD(HW)
IC1
i
= 100 k and R3 = 22 k in
SSD(HW)
OSCIO
, configuring pin OSCIO as an input.
slave
osc
OSCIO
is connected between pin OSCREF
TDA8933
V
SSD(HW)
IC2
Equation 8
Class-D audio amplifier
OSCREF
010aaa138
TDA8933
© NXP B.V. 2007. All rights reserved.
and
Equation 9
28 of 47
(9)
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