tda8374bh NXP Semiconductors, tda8374bh Datasheet - Page 41

• Manufacturer Part Number: tda8374bh
• Description: Tda837x Family I?c-bus Controlled Economy Pal/ntsc And Ntsc Tv-processors
• Manufacturer: NXP Semiconductors

Philips Semiconductors
7. Measured in accordance with the test line given in Fig.14. For the differential phase test the peak white setting is
8. This figure is valid for the complete video signal amplitude (peak white-to-black), see Fig.15.
9. The noise inverter is only active in the ‘strong signal mode’ (no noise detected in the incoming signal).
10. The test set-up and input conditions are given in Fig.16. The figures are measured with an input signal of
11. Measured with a source impedance of 75 , where:
12. The AGC response time is also dependent on the acquisition time of the PLL demodulator. The values given are valid
13. The AFC control voltage is obtained from the control voltage of the VCO of the PLL demodulator. The tuning
14. V
15. V
16. The Automatic Volume Levelling (AVL) circuit automatically stabilizes the audio output signal to a certain level which
17. V
18. V
19. Unweighted RMS value, V
20. Audio attenuator at 20 dB; temperature range = 10 to 50 C.
21. Signal with negative-going sync. Amplitude includes sync pulse amplitude.
22. This parameter is measured at nominal settings of the various controls.
23. Indicated as a signal for a colour bar with 75% saturation (chroma-to-burst ratio = 2.2 : 1).
24. Nominal contrast is specified with the DAC in position 20H. Nominal saturation as maximum 10 dB. At nominal
25. The luminance output and input of the TDA8375A, TDA8377A, TDA8375 and TDA8377 can be connected directly.
1997 Jul 01
I
and NTSC TV-processors
2
reduced to 87%.
a) The differential gain is expressed as a percentage of the difference in peak amplitudes between the largest and
b) The phase difference is defined as the difference in degrees between the largest and smallest phase angle.
10 mV (RMS).
when the PLL is in lock.
information is supplied to the tuning system via the I
is valid only when the SL bit = 1.
can be set by means of the volume control. This AVL function prevents big audio output fluctuations due to variation
of the modulation depth of the transmitter. The AVL can be switched on and off via the I
For the TDA8373 the AVL is active over an input voltage range (measured at the de-emphasis output) between
75 and 750 mV (RMS). For the TDA8374 this input level is dependent on the crystals which are connected to the
colour decoder. When only 3.5 MHz crystals are connected (indicated via the XA/XB bits) the active input level is
identical to that of the TDA8373. When a 4.4 MHz crystal is connected the input signal range is increased to
150 to 1500 mV (RMS), this to cope with the larger FM swing of European transmitters.
The AVL control curve for the 2 standards is given in Fig.29 and Fig.30. The control range of +6 to 14 dB is valid
for input signals with 50% of the maximum frequency deviation.
settings of brightness and white point the black level at the outputs is 300 mV lower than the level of the black current
measuring pulses.
When additional picture improvement ICs (such as the TDA9170) are applied the inputs of these ICs must be
AC-coupled because of the black level clamp requirement. The output of the picture improvement ICs can be directly
coupled to the luminance input as long as the DC level of the signal has a value between 1 and 7 V.
To be able to apply CTI ICs such as the TDA4565 and TDA4566 the gain of the luminance channel can be increased
via the setting of the GAI bit in the I
C-bus controlled economy PAL/NTSC
i
i
i
i
= 100 mV (RMS), FM: 1 kHz, f = 50 kHz.
= 50 mV (RMS), f = 4.5 to 5.5 MHz; FM: 70 Hz, 50 kHz deviation; AM: 1 kHz, 30% modulation.
= 100 mV (RMS), f = 5.5 MHz; FM: 1 kHz, 17.5 kHz deviation, 15 kHz bandwidth; audio attenuator at 6 dB.
= 100 mV (RMS), f = 4.5 to 5.5 MHz, FM: 1 kHz, 100 kHz deviation.
smallest value relative to the subcarrier amplitude at blanking level.
i
= 100 mV (RMS), FM: 1 kHz, 50 kHz deviation, volume control: 6 dB.
2
C-bus subaddress 03.
2
S/N = 20 log
C-bus. Two bits are reserved for this function. The AFC value
41
-------------------------------------------------------- -
V
m rms
V
O(b-w)
B = 5 MHz
2
TDA837x family
C-bus.
Preliminary specification