uda1340 NXP Semiconductors, uda1340 Datasheet
uda1340
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uda1340 Summary of contents
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... DATA SHEET UDA1340 Low-voltage low-power stereo audio CODEC with DSP features Preliminary specification Supersedes data of 1997 May 20 File under Integrated Circuits, IC01 INTEGRATED CIRCUITS 1997 Jul 09 ...
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... MSB-justified data format with word lengths bits and the LSB justified serial data format with word lengths of 16, 18 and 20 bits. The UDA1340 has special sound processing features in playback mode, de-emphasis, volume, bass boost, treble, and soft mute, which can be controlled via the microcontroller interface ...
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... P power consumption in record only AD mode P power consumption in power-down PD mode 1997 Jul 09 CONDITIONS MIN. 2.7 2.7 2.7 2 dB; A-weighted A-weighted dB; A-weighted code = 0; A weighted 3 Preliminary specification UDA1340 TYP. MAX. UNIT 3.0 3.6 V 3.0 3.6 V 3.0 3.6 V 3.0 3.6 V 4 ...
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... DC-CANCELLATION FILTER DIGITAL INTERFACE DSP FEATURES INTERPOLATION FILTER NOISE SHAPER DAC DAC DDO V SSO V DDA(DAC) Fig.1 Block diagram. 4 Preliminary specification V ADCN V ref( VINR 8 TEST1 21 TEST2 20 TEST3 13 L3MODE 14 L3-BUS L3CLOCK INTERFACE 15 L3DATA 12 SYSCLK 24 VOUTR 22 28 MGG839 V SSA(DAC) V ref(D) UDA1340 ...
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... V ref( DDA(ADC) V SSO 2 27 VINL 3 26 VOUTL V ref( DDO VINR VOUTR ADCN DDA(DAC) V ADCP 22 V SSA(DAC) 7 UDA1340 TEST1 8 21 TEST2 OVERFL 9 20 TEST3 V DDD 10 DATAI 19 V SSD DATAO 11 18 SYSCLK L3MODE BCK 13 16 L3CLOCK 14 15 ...
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... The formats are illustrated in Fig.3. Left and right data-channel words are time multiplexed. Analog-to-Digital Converter (ADC) The stereo ADC of the UDA1340 consists of two third-order Sigma-Delta modulators. They have a modified Ritchie-coder architecture in a differential switched capacitor implementation. The over-sampling ratio is 128. ...
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... A post-filter is not needed due s to the inherent filter function of the DAC. On-board 50 s amplifiers convert the FSDAC output current to an output 108 s voltage signal capable of driving a line output. 3 shifts s 7 Preliminary specification UDA1340 ...
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... Philips Semiconductors Low-voltage low-power stereo audio CODEC with DSP features dbook, full pagewidth 1997 Jul 09 8 Preliminary specification UDA1340 ...
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... Data bits represent a 6-bit device address, with bit 7 being the MSB and bit 2 the LSB. The address of the UDA1340 is 000101 (bit 7 to bit 2). In the event that the UDA1340 receives a different address, it will deselect its microcontroller interface logic. ...
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... L3MODE t s;MT L3CLOCK L3DATA write 1997 Jul s;MA t s;DAT t h;DAT BIT 0 Fig.4 Timing address mode h;DAT t s;DAT BIT 0 Fig.5 Timing for data transfer mode. 10 Preliminary specification t s; BIT 7 MGD016 t halt t h; h;DAT BIT 7 MGD017 UDA1340 ...
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... PC1 PC0 11 Preliminary specification address MGD018 REGISTER SELECTED System Clock frequency ( data Input Format ( DC-filter not used REGISTER SELECTED Volume Control ( Bass Boost ( Treble ( DE-emphasis ( MuTe Mode ( Power Control ( UDA1340 ...
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... Table 10). Table 10 Volume settings VC5 0 FUNCTION S-bus MSB justified 1 not used 1 not used 1 not used 1 12 Preliminary specification UDA1340 DC FUNCTION 0 no DC-filtering 1 DC-filtering VC4 VC3 VC2 VC1 VC0 ...
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... FLAT SET (dB Preliminary specification UDA1340 BASS BOOST MIN. SET (dB) MAX. SET (dB TREBLE MIN. SET (dB) MAX. SET (dB ...
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... Preliminary specification ONTROL PC1 PC0 ADC 0 0 off 0 1 off CONDITIONS MIN 3000 300 VALUE 90 UDA1340 FUNCTION flat min. min. max. FUNCTION DAC off on off on MAX. UNIT 5.0 V 150 C +125 C +85 C +3000 V +300 V UNIT K/W ...
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... with respect to V pin 4 1 kHz with respect to V pin 28 (THD + N)/S < 0. note 2 ) must be connected to the same external power supply unit. SS resistor must be connected in series with the DAC output 15 Preliminary specification UDA1340 MIN. TYP. MAX. 2.7 3.0 3.6 2.7 3.0 3.6 2.7 3.0 3.6 2.7 3.0 3.6 4.5 200 3.5 15 ...
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... L . CONDITIONS dB; A-weighted A-weighted kHz; ripple ripple(p- dB; A-weighted code = 0; A-weighted kHz; ripple V = 100 mV ripple(p-p) 16 Preliminary specification UDA1340 MIN. TYP. MAX. UNIT 0 dBA 95 dBA 100 0 ...
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... MHz sys MSB-justified format address mode address mode data transfer mode data transfer mode data transfer mode and address mode data transfer mode and address mode 17 Preliminary specification UDA1340 MIN. TYP. MAX 131 ...
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... Philips Semiconductors Low-voltage low-power stereo audio CODEC with DSP features handbook, full pagewidth WS t BCK( BCK T cy DATAO DATAI 1997 Jul 09 t h; d(DATO)(WS) t BCK(L) Fig.7 Serial interface timing. 18 Preliminary specification UDA1340 t d(DATO)(BCK) t h;DATO t s;DATI t h;DATI MGG840 ...
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... VOUTL R22 ( VOUTR R27 ( ref(D) 28 C23 100 nF ( SSA(DAC) V DDA(DAC) C27 100 nF (63 V) C10 100 F R29 ( DDA UDA1340 ( R23 left output 100 X3 R26 right output 100 (16 V) MGK582 ...
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... Jul 2.5 scale (1) ( 0.38 0.20 10.4 5.4 7.9 0.65 0.25 0.09 10.0 5.2 7.6 REFERENCES JEDEC EIAJ MO-150AH 20 Preliminary specification detail 1.03 0.9 1.25 0.2 0.13 0.63 0.7 EUROPEAN PROJECTION UDA1340 SOT341 ( 1.1 8 0.1 o 0.7 0 ISSUE DATE 93-09-08 95-02-04 ...
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... Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 21 Preliminary specification UDA1340 ...
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... Philips customers using or selling these products for use in such applications their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1997 Jul 09 22 Preliminary specification UDA1340 ...
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... Philips Semiconductors Low-voltage low-power stereo audio CODEC with DSP features 1997 Jul 09 NOTES 23 Preliminary specification UDA1340 ...
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Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, ...