uda1351ts-n1 NXP Semiconductors, uda1351ts-n1 Datasheet - Page 14

• Manufacturer Part Number: uda1351ts-n1
• Description: 96 Khz Iec 958 Audio Dac
• Manufacturer: NXP Semiconductors

Philips Semiconductors
8.6.4
The data write mode is explained in the signal diagram of
Fig.6. For writing data to a device, four bytes must be sent
(see Table 6):
1. One byte starting with ‘01’ for signalling the write
2. One byte starting with a ‘0’ for signalling the write
3. Two data bytes with D15 being the MSB and D0 being
It should be noted that each time a new destination register
address needs to be written, the device address must be
sent again.
8.6.5
To read data from the device, a prepare read must first be
done and then data read. The data read mode is explained
in the signal diagram of Fig.7.
Table 6 L3 write data
Table 7 L3 read data
2001 Feb 05
BYTE
BYTE
96 kHz IEC 958 audio DAC
1
2
3
4
1
2
3
4
5
6
action to the device, followed by the device address
(‘011000’ for the UDA1351TS)
action, followed by seven bits indicating the
destination address in binary format with A6 being the
MSB and A0 being the LSB
the LSB.
D
D
address
data transfer
data transfer
data transfer
address
data transfer
address
data transfer
data transfer
data transfer
ATA WRITE MODE
ATA READ MODE
L3 MODE
L3 MODE
device address
register address
data byte 1
data byte 2
device address
register address
device address
register address
data byte 1
data byte 2
ACTION
ACTION
14
0 or 1
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7
D15
D15
D7
D7
0
0
0
1
1
For reading data from a device, the following six bytes are
involved (see Table 7):
1. One byte with the device address, including ‘01’ for
2. One byte is sent with the register address from which
3. One byte with the device address, including ‘11’ is sent
4. One byte, sent by the device to the bus, with the
5. Two bytes, sent by the device to the bus, with the data
FIRST IN TIME
FIRST IN TIME
signalling the write action to the device
data needs to be read. This byte starts with a ‘1’, which
indicates that there will be a read action from the
register, followed again by seven bits for the
destination address in binary format, with A6 being the
MSB and A0 being the LSB
to the device. The ‘11’ indicates that the device must
write data to the microcontroller
(requested) register address and a flag bit indicating
whether the requested register was valid (bit is logic 0)
or invalid (bit is logic 1)
information in binary format, with D15 being the MSB
and D0 being the LSB.
D14
D14
D6
D6
A6
A6
A6
1
1
1
D13
D13
A5
D5
A5
A5
D5
0
0
0
D12
D12
A4
D4
A4
A4
D4
1
1
1
D11
D11
A3
D3
A3
A3
D3
1
1
1
UDA1351TS
D10
D10
Product specification
D2
D2
A2
A2
A2
LATEST IN TIME
LATEST IN TIME
0
0
0
D9
D1
D9
D1
A1
A1
A1
0
0
0
D8
D0
D8
D0
A0
A0
A0
0
0
0