pca9537dp NXP Semiconductors, pca9537dp Datasheet - Page 4

• Manufacturer Part Number: pca9537dp
• Description: 4-bit I2c And Smbus Low Power I/o Port With Interrupt And Reset
• Manufacturer: NXP Semiconductors

Philips Semiconductors
REGISTERS
Command Byte
The command byte is the first byte to follow the address byte during
a write transmission. It is used as a pointer to determine which of the
following registers will be written or read.
Register 0 – Input Port Register
This register is a read only port. It reflects the incoming logic levels
of the pins, regardless of whether the pin is defined as an input or an
output by Register 3. Writes to this register have no effect.
The default value ‘X’ is determined by the externally applied logic
level.
Register 1 – Output Port Register
This register reflects the outgoing logic levels of the pins defined as
outputs by Register 3. Bit values in this register have no effect on
pins defined as inputs. Reads from this register return the value that
is in the flip-flop controlling the output selection, NOT the actual pin
value.
Register 2 – Polarity Inversion Register
This register allows the user to invert the polarity of the Input Port
Register data. If a bit in this register is set (written with ‘1’), the
corresponding Input Port data is inverted. If a bit in this register is
cleared (written with a ‘0’), the Input Port data polarity is retained.
Register 3 – Configuration Register
This register configures the directions of the I/O pins. If a bit in this
register is set, the corresponding port pin is enabled as an input with
high impedance output driver. If a bit in this register is cleared, the
corresponding port pin is enabled as an output. At reset, the I/Os are
configured as inputs.
2006 Sep 21
4-bit I
I/O port with interrupt and reset
default
default
default
default
Command
bit
bit
bit
bit
0
1
2
3
2
C7
O7
N7
I7
1
1
1
C-bus and SMBus low power
0
Read/write byte
Read/write byte
Read/write byte
C6
O6
N6
I6
not used
1
not used
1
not used
1
not used
0
Read byte
Protocol
C5
O5
N5
I5
1
1
1
0
O4
C4
N4
I4
1
1
1
0
Function
Polarity inversion register
Configuration register
Input port register
Output port register
O3
C3
N3
I3
X
1
1
0
O2
C2
N2
I2
X
1
1
0
O1
C1
N1
I1
X
1
1
0
O0
C0
N0
I0
X
1
0
1
4
Power-on Reset
When power is applied to V
PCA9537 in a reset condition until V
point, the reset condition is released and the PCA9537 registers and
state machine will initialize to their default states. Thereafter, V
must lowered below 0.2 V to reset the device.
For a power reset cycle, V
restored to the operating voltage.
RESET Input
A reset can be accomplished by holding the RESET pin LOW for a
minimum of t
machine will be held in their default state until the RESET input is
once again HIGH. This input requires a pull-up resistor to V
active connection is used.
Interrupt Output
The open-drain interrupt output is activated when one of the port
pins change state and the pin is configured as an input. The
interrupt is deactivated when the input returns to its previous state or
the input port register is read.
Note that changing an I/O from an output to an input may cause a
false interrupt to occur if the state of the pin does not match the
contents of the input port register.
W
. The PCA9537 registers and SMBus/I
DD
DD
must be lowered below 0.2 V and then
, an internal power-on reset holds the
DD
has reached V
PCA9537
Product data sheet
2
POR
C state
. At that
DD
DD
if no