adv7171a-dbrd Analog Devices, Inc., adv7171a-dbrd Datasheet - Page 24

• Manufacturer Part Number: adv7171a-dbrd
• Description: Digital Pal/ntsc Video Encoder With 10-bit Ssaf ?nd Advanced Power Management
• Manufacturer: Analog Devices, Inc.

ADV7170/ADV7171
Mode 2: Master Option HSYNC , VSYNC , BLANK
(Timing Register 0 TR0 = X X X X X 1 0 1)
In this mode the ADV7170/ADV7171 can generate horizontal and vertical SYNC signals. A coincident low transition of both HSYNC
and VSYNC inputs indicates the start of an odd field. A VSYNC low transition when HSYNC is high indicates the start of an even field.
The BLANK signal is optional. When the BLANK input is disabled, the ADV7170/ADV7171 automatically blank all normally blank lines
as per CCIR-624. Mode 2 is shown in Figure 27 (NTSC) and Figure 28 (PAL). Figure 29 shows the HSYNC , BLANK , and VSYNC for an
even-to-odd field transition relative to the pixel data. Figure 30 shows the HSYNC , BLANK , and VSYNC for an odd-to-even field
transition relative to the pixel data.
HSYNC
BLANK
HSYNC
BLANK
VSYNC
VSYNC
HSYNC
BLANK
VSYNC
PIXEL
HSYNC
VSYNC
BLANK
DATA
PIXEL
DATA
622
309
DISPLAY
DISPLAY
623
310
NTSC = 16 × CLOCK/2
NTSC = 16 × CLOCK/2
PAL = 12 × CLOCK/2
PAL = 12 × CLOCK/2
624
311
EVEN FIELD
Figure 29. Timing Mode 2 Even-to-Odd Field Transition Master/Slave
Figure 30. Timing Mode 2 Odd-to-Even Field Transition Master/Slave
ODD FIELD
625
312
313
1
NTSC = 122 × CLOCK/2
PAL = 132 × CLOCK/2
314
2
Figure 28. Timing Mode 2 (PAL)
Rev. B | Page 24 of 64
315
3
ODD FIELD
VERTICAL BLANK
VERTICAL BLANK
EVEN FIELD
316
4
NTSC = 122 × CLOCK/2
PAL = 132 × CLOCK/2
NTSC = 858 × CLOCK/2
PAL = 864 × CLOCK/2
317
5
Cb
318
6
Y
319
Cr
7
Y
320
Cb
21
Cb
Y
22
334
Cr
DISPLAY
23
335
Y
DISPLAY
336