saa7120 NXP Semiconductors, saa7120 Datasheet - Page 21

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saa7120

Manufacturer Part Number
saa7120
Description
Digital Video Encoder Condenc
Manufacturer
NXP Semiconductors
Datasheet

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Table 34 Subaddress 73 and 74
Table 35 Subaddress 75
Table 36 Subaddress 76, 77 and 7C
Table 37 Subaddress 78, 79 and 7C
Table 38 Subaddress 7C
Table 39 Subaddress 7A to 7C
1997 Jan 06
TTXHS
TTXHD
VS_S
TTXOVS
TTXOVE
TTXEVS
TTXEVE
TTX60
FAL
LAL
DATA BYTE
DATA BYTE
DATA BYTE
DATA BYTE
DATA BYTE
DATA BYTE
Digital Video Encoder (ConDENC)
start of signal on pin TTXRQ see Fig.7
indicates the delay in clock cycles between rising edge of TTXRQ output and valid data on pin TTX
minimum value has to be TTXHD = 2
Vertical Sync. shift between RCV1 and RCV2 (switched to output) in master mode it is possible to shift
H-sync (RCV2; CBLF = 0) against V-sync (RCV1; SRCV1 = 00)
first line of occurrence of signal on pin TTXRQ in odd field
last line of occurrence of signal on pin TTXRQ in odd field
first line of occurrence of signal on pin TTXRQ in even field
last line of occurrence of signal on pin TTXRQ in even field
first active line = FAL + 4 for M-systems, = FAL + 1 for other systems, measured in lines FAL = 0
coincides with the first field synchronization pulse
last active line = LAL + 3 for M-systems, = LAL for other system, measured in lines LAL = 0 coincides
with the first field synchronization pulse
LOGIC
LEVEL
standard value: VS_S = 3
line = (TTXOVS + 4) for M-systems
line = (TTXOVS + 1) for other systems
line = (TTXOVE + 3) for M-systems
line = TTXOVE for other systems
line = (TTXEVS + 4) for M-systems
line = (TTXEVS + 1) for other systems
line = (TTXEVE + 3) for M-systems
line = TTXEVE for other systems
0
1
enables NABTS (FISE = 1) or European TTX (FISE = 0); default after reset
enables World Standard Teletext 60 Hz (FISE = 1)
21
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
SAA7120; SAA7121
Preliminary specification

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