ep2c35 Altera Corporation, ep2c35 Datasheet - Page 66

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ep2c35

Manufacturer Part Number
ep2c35
Description
Cyclone Ii Device Family Data Sheet
Manufacturer
Altera Corporation
Datasheet

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I/O Structure & Features
2–54
Cyclone II Device Handbook, Volume 1
The reduced swing differential signaling (RSDS) and mini-LVDS
standards are derivatives of the LVDS standard. The RSDS and
mini-LVDS I/O standards are similar in electrical characteristics to
LVDS, but have a smaller voltage swing and therefore provide increased
power benefits and reduced electromagnetic interference (EMI).
Cyclone II devices support the RSDS and mini-LVDS I/O standards at
data rates up to 311 Mbps at the transmitter.
A subset of pins in each I/O bank (on both rows and columns) support
the high-speed I/O interface. The dual-purpose LVDS pins require an
external-resistor network at the transmitter channels in addition to 100-Ω
termination resistors on receiver channels. These pins do not contain
dedicated serialization or deserialization circuitry. Therefore, internal
logic performs serialization and deserialization functions.
Cyclone II pin tables list the pins that support the high-speed I/O
interface. The number of LVDS channels supported in each device family
member is listed in
EP2C5
EP2C8
EP2C15
EP2C20
EP2C35
EP2C50
Table 2–18. Cyclone II Device LVDS Channels (Part 1 of 2)
Device
Table
2–18.
Pin Count
144
144
256
240
484
484
208
256
208
256
484
256
484
672
672
Number of LVDS
Altera Corporation
Channels
128 (136)
128 (136)
131 (139)
201 (209)
119 (127)
189 (197)
31 (35)
56 (60)
61 (65)
29 (33)
53 (57)
75 (79)
52 (60)
45 (53)
52 (60)
February 2007
(1)

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