mc68hc908gr8vp Freescale Semiconductor, Inc, mc68hc908gr8vp Datasheet - Page 84

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mc68hc908gr8vp

Manufacturer Part Number
mc68hc908gr8vp
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Clock Generator Module (CGMC)
7.5.5 PLL VCO Range Select Register
The PLL VCO range select register (PMRS) contains the programming information required for the
hardware configuration of the VCO.
VRS7–VRS0 — VCO Range Select Bits
7.5.6 PLL Reference Divider Select Register
The PLL reference divider select register (PMDS) contains the programming information for the modulo
reference divider.
84
These read/write bits control the hardware center-of-range linear multiplier L which, in conjunction with
E (see
hardware center-of-range frequency, f
PCTL is set. (See
register disables the PLL and clears the BCS bit in the PLL control register (PCTL). (See
Clock Selector Circuit
for a default range multiply value of 64.
7.3.3 PLL
Address:
Address:
PMRS may be called PVRS on other HC08 derivatives.
The VCO range select bits have built-in protection such that they cannot be
written when the PLL is on (PLLON = 1) and such that the VCO clock
cannot be selected as the source of the base clock (BCS = 1) if the VCO
range select bits are all clear.
The PLL VCO range select register must be programmed correctly.
Incorrect programming can result in failure of the PLL to achieve lock.
PMDS may be called PRDS on other HC08 derivatives.
Reset:
Reset:
Read:
Read:
Write:
Write:
Circuits,
Figure 7-9. PLL Reference Divider Select Register (PMDS)
7.3.7 Special Programming
$003A
$003B
VRS7
Bit 7
Bit 7
Figure 7-8. PLL VCO Range Select Register (PMRS)
and
0
0
0
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
7.3.7 Special Programming
7.3.6 Programming the
= Unimplemented
VRS6
6
1
6
0
0
VRS
VRS5
5
0
5
0
0
. VRS7–VRS0 cannot be written when the PLLON bit in the
NOTE
NOTE
NOTE
Exceptions.) A value of $00 in the VCO range select
VRS4
4
0
4
0
0
PLL, and
Exceptions.). Reset initializes the register to $40
VRS3
RDS3
3
0
3
0
7.5.1 PLL Control
VRS2
RDS2
2
0
2
0
VRS1
RDS1
1
0
1
0
Register), controls the
Freescale Semiconductor
VRS0
RDS0
Bit 0
Bit 0
0
1
7.3.8 Base

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