mc68hc908as60 Freescale Semiconductor, Inc, mc68hc908as60 Datasheet - Page 207

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mc68hc908as60

Manufacturer Part Number
mc68hc908as60
Description
Mc68hc908as60 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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14.5 COP Control Register
14.6 Interrupts
14.7 Monitor Mode
14.8 Low-Power Modes
14.8.1 Wait Mode
MC68HC908AS60 — Rev. 1.0
Address:
The COP control register is located at address $FFFF and overlaps the
reset vector. Writing any value to $FFFF clears the COP counter and
starts a new timeout period. Reading location $FFFF returns the low
byte of the reset vector.
The COP does not generate CPU interrupt requests.
The COP is disabled in monitor mode when V
pin or on the RST pin.
The WAIT and STOP instructions put the MCU in low power-
consumption standby modes.
The COP remains active in wait mode. To prevent a COP reset during
wait mode, periodically clear the COP counter in a CPU interrupt routine.
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
For More Information On This Product,
Computer Operating Properly (COP) Module
$FFFF
Bit 7
Figure 14-2. COP Control Register (COPCTL)
Go to: www.freescale.com
6
5
Low byte of reset vector
Unaffected by reset
Clear COP counter
Computer Operating Properly (COP) Module
4
3
HI
is present on the IRQ
2
COP Control Register
1
Technical Data
Bit 0

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