mc68hc05bs8 Freescale Semiconductor, Inc, mc68hc05bs8 Datasheet - Page 56

• Manufacturer Part Number: mc68hc05bs8
• Description: Mc68hc05 Family Of Low-cost Single-chip Microcontrollers.
• Manufacturer: Freescale Semiconductor, Inc

6
RTIF - Real Time Interrupt Flag
When RTIF is set, a CPU interrupt request is generated if RTIE is set. The clock frequency that
drives the RTI circuit is E/12
by writing a “0” to the bit.
CTOFE - CTimer Overflow Interrupt Enable
RTIE - Real Time Interrupt Enable
RT1, RT0 - Rate Select for COP watchdog and RTI
See Section 6.2.3 on COP watchdog reset.
6.2.3
The COP (Computer Operating Properly) watchdog timer function is implemented by using the
output of the RTI selected output. The minimum COP reset rates are determined by RT0 and RT1
of CTimer Control and Status register. If the COP circuit times out, an internal reset is generated
and the reset vector is fetched (at $3FFE & $3FFF). Preventing a COP time-out is achieved by
periodically writing a “0” to bit 0 of address $3FF0.
The COP reset function is enabled after a reset, and can be disabled by writing a “0” to the COP
bit (bit 6) in the Option Register at address $001D. Once disabled, it cannot be enabled except by
a reset function. Also, STOP mode cannot be entered when the COP watchdog is enabled.
6-12
RT0 and RT1 should only be changed immediately after COP watchdog timer has been reset.
RT1
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
0
0
1
1
COP Watchdog Reset
RT0
–
–
–
0
1
0
1
A real time interrupt has occurred.
A real time interrupt has not occurred.
TOF interrupt is enabled.
TOF interrupt is disabled.
Real time interrupt is enabled.
Real time interrupt is disabled.
Divide Ratio
13
Table 6-1 COP Reset and RTI Rates
. The RTI rate is selectable by the RT1 and RT0 bits. RTIF is cleared
2
2
2
2
14
15
16
17
TIMERS
Minimum RTI Rate
Bus Frequency, f
7.81ms
15.6ms
62.5ms
31.2ms
OP
=2.1MHz
Minimum COP Reset Rate (RTI x 7)
1/(f
OP
/Divide Ratio/7)
54.7ms
109ms
219ms
438ms
MC68HC05BS8
TPG