mc68hc05l28 Freescale Semiconductor, Inc, mc68hc05l28 Datasheet - Page 64

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mc68hc05l28

Manufacturer Part Number
mc68hc05l28
Description
?exible General-purpose Microcomputer
Manufacturer
Freescale Semiconductor, Inc
Datasheet
6
When using the timer overflow function and reading the free-running counter at random times to
measure an elapsed time, a problem may occur whereby the timer overflow flag is unintentionally
cleared if:
Reading the alternate counter register instead of the counter register will avoid this potential
problem.
TCAP1 — Timer capture 1
This bit reflects the current status of the timer capture 1 input.
Note:
TCAP2 — Timer capture 2
This bit reflects the current state of the timer capture 2 Input.
Note:
OC2F — Output compare 2 flag
This bit is set when the output compare register contents match those of the free-running counter;
an output compare interrupt will be generated, if OC2IE is set. OC2F is cleared by reading the TSR
and then the output compare low 2 register at $27.
Bit 0 — always reads zero.
MOTOROLA
6-8
– the timer status register is read or written when TOF is set and
– the LSB of the free-running counter is read, but not for the purpose of
1 (set)
0 (clear) –
servicing the flag.
On the MC68HC05L28, TCAP1 is connected directly to PD0 which defaults to an input
with pull-up on reset. TCAP1 will be ‘1’ unless PD0 is externally driven low.
On the MC68HC05L28, TCAP2 is connected directly to PD2 which defaults to an input
with pull-up on reset. TCAP2 will be ‘1’ unless PD2 is externally driven low.
A valid output compare has occurred.
No output compare has occurred.
16-BIT PROGRAMMABLE TIMER
MC68HC05L28
TPG

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