mc68hc11k4vfu4 Freescale Semiconductor, Inc, mc68hc11k4vfu4 Datasheet - Page 44

• Manufacturer Part Number: mc68hc11k4vfu4
• Description: 8-bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

OPT2 —System Configuration Options 2
LIRDV—LIR Driven
CWOM —Port C Wired-OR Mode
Bit 5 —Not implemented
IRVNE —Internal Read Visibility/Not E
LSBF —SPI LSB First Enable
SPR2 —SPI Clock (SCK) Rate Select
XDV[1:0] —XOUT Clock Divide Select
PORTD —Port D Data
DDRD —Data Direction Register for Port D
Bits [7:6] — Not implemented
DDD[5:0] — Data Direction for Port D
44
MOTOROLA
RESET:
RESET:
RESET:
Alt. Pin
Func.:
Refer to 2 Operating Modes.
Always read zero
Refer to 2 Operating Modes.
Refer to 8 Serial Peripheral Interface.
Refer to 8 Serial Peripheral Interface.
Refer to 2 Operating Modes.
Always read zero
0 = Port C operates normally.
1 = Port C outputs are open-drain.
0 = Corresponding pin configured for input
1 = Corresponding pin configured for output
LIRDV
Bit 7
Bit 7
Bit 7
—
—
—
0
0
0
When the SPI system is in slave mode, DDD5 has no meaning nor effect. When
the SPI system is in master mode, DDD5 determines whether bit 5 of PORTD is an
error detect input (DDD5 = 0) or a general-purpose output (DDD5 = 1). If the SPI
system is enabled and expects any of bits [4:2] to be an input that bit will be an input
regardless of the state of the associated DDR bit. If any of bits [4:2] are expected
to be outputs that bit will be an output only if the associated DDR bit is set.
CWOM
—
—
—
6
0
6
0
6
0
DDD5
PD5
SS
—
5
0
5
5
0
I
IRVNE
DDD4
SCK
PD4
—
4
4
4
0
I
NOTE
DDD3
MOSI
LSBF
PD3
3
0
3
3
0
I
DDD2
SPR2
MISO
PD2
2
0
2
2
0
I
XDV1
DDD1
PD1
TxD
1
0
1
1
0
I
M68HC11 K Series
DDD0
XDV0
$0038
$0008
$0009
MC68HC11KTS/D
Bit 0
Bit 0
PD0
RxD
Bit 0
0
0
I