mc68hc11k4vfu4 Freescale Semiconductor, Inc, mc68hc11k4vfu4 Datasheet - Page 58

• Manufacturer Part Number: mc68hc11k4vfu4
• Description: 8-bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

SPR[2:0] —SPI Clock Rate Selects (SPR2 is located in OPT2 register)
SPSR —Serial Peripheral Status Register
SPIF —SPI Transfer Complete Flag
WCOL —Write Collision Error Flag
Bit 5 —Not implemented
MODF —Mode Fault (Mode fault terminates SPI operation)
Bits [3:0] —Not implemented
SPDR —SPI Data
58
MOTOROLA
RESET:
This flag is set when an SPI transfer is complete (after eight SCK cycles in a data transfer). Clear this
flag by reading SPSR, then access SPDR.
This flag is set if the MCU tries to write data into SPDR while an SPI data transfer is in progress. Clear
this flag by reading SPSR, then access SPDR.
Always reads zero
Set when SS is pulled low while MSTR = 1. Cleared by SPSR read followed by SPCR write.
Always read zero
SPI is double buffered in, single buffered out.
SPR[2:0]
0 = No SPI transfer complete or SPI transfer still in progress
1 = SPI transfer complete
0 = No write collision error
1 = SPDR written while SPI transfer in progress
0 = No mode fault error
1 = SS pulled low in master mode
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
SPIF
Bit 7
0
Bit 7
Bit 7
WCOL
6
0
6
6
E Clock By
Divide
128
16
32
16
64
2
4
8
—
5
0
Table 8 SPI Clock Rate Selects
5
5
MODF
E = 2 MHz (Baud)
4
0
Frequency at
4
4
15.625 kHz
31.25 kHz
62.5 kHz
1.0 MHz
500 kHz
125 kHz
250 kHz
125 kHz
—
3
0
3
3
E = 3 MHz (Baud)
—
2
0
Frequency at
2
2
46.875 kHz
23.438 kHz
187.5 kHz
93.75 kHz
187.5 kHz
3.0 MHz
750 kHz
375 kHz
—
1
0
1
1
E = 4 MHz (Baud)
Bit 0
M68HC11 K Series
—
$002A
Frequency at
0
$0029
MC68HC11KTS/D
Bit 0
Bit 0
31.25 kHz
62.5 kHz
4.0 MHz
1.0 MHz
250 kHz
125 kHz
500 kHz
250 kHz