at75c220 ATMEL Corporation, at75c220 Datasheet - Page 27

• Manufacturer Part Number: at75c220
• Description: Smart Internet Appliance Processor Siap
• Manufacturer: ATMEL Corporation

SDMC Register Map
Base Address: 0xFF008000
Table 12. SDMC Register Map
SDRAM_MODE Register
Register Name: SDRAM_MODE
Access Type: Read/write
Reset Value: 0x0
•
Offset
0x0000
0x0004
0x0008
0x000C
0x0010
0x0014
MODE
MODE
others
000
001
010
011
100
31
23
15
7
–
–
–
MODE
Description
Normal mode. Any access to the SDRAM will be decoded normally.
The NOP command is issued to the SDRAM when the host accesses the SDRAM memory area, regardless of the
cycle.
The all banks precharge command is issued to the SDRAM when the host accesses the SDRAM memory area,
regardless of the cycle.
The load mode register command is issued to the SDRAM when the host accesses the SDRAM memory area,
regardless of the cycle. The address offset with respect to the SDRAM memory base address is used to program the
mode register. For example, when this mode is activated, an access to the “SDRAM_BASE + offset” generates a load
mode register command with the value offset written to the mode register of the SDRAM.
A refresh command is issued to the SDRAM. An all banks precharge command must precede.
Reserved
SDRAM_MODE
SDRAM_TIMER
SDRAM_CFG
SDRAM_16BIT
SDRAM_CS0_ADDR
SDRAM_CS1_ADDR
Register Name
30
22
14
6
–
–
–
29
21
13
5
–
–
–
–
Description
Mode Register
Timer Register
Configuration Register
Selects 16-/32-bit modes
Base address for CS0
Base address for CS1
28
20
12
4
–
–
–
–
27
19
11
3
–
–
–
–
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Access
26
18
10
2
–
–
–
–
25
17
9
1
–
–
–
–
Reset Value
0x00000000
0x00000000
0x00000000
0x00000001
0x00000040
0x00000050
MODE
24
16
8
0
–
–
–
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