adau1361 Analog Devices, Inc., adau1361 Datasheet - Page 57

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adau1361

Manufacturer Part Number
adau1361
Description
Stereo, Low Power, 96 Khz, 24-bit Audio Codec With Integrated Pll
Manufacturer
Analog Devices, Inc.
Datasheet

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R17
Bit
Reserved
Table 44. Converter Con
B
[6:5]
4
3
[2:0]
it
7
: Con
Bit Name
DAPAIR[1:0]
DAOSR
ADOSR
CONVSR[2:0]
verter Con
Bit 6
trol
trol 0 Register
0 16407 (0x4
On-chip DAC serial audio data selection in TDM 4 or TDM 8 mode.
Description
Setting
00
01
10
11
DAC oversampling ratio.
0 = 128×
1 = 64×.
ADC o
0 = 1
1 = 6
Conv
selec
frequenc
Setting
000
001
010
011
100
101
110
111
DAPAIR[1:0]
28× (default).
4×.
ted is a ratio of the base sa
erter sampling rate. The ADCs and DACs operate at the sampling rate set in this register. The converter rate
versampling ratio.
Bit 5
y of the core clock. The
(default).
017)
Bit 4
DAO
SR
mplin
Pair
Fir
Second pair
Third pair
Fourth pair
Sampling
f
f
f
f
f
f
f
Reserved
serial port mirr
S
S
S
S
S
S
S
Rev. 0 | Page 57 of 80
/6
/4
/3
/2
/1.5
/0.5
st pair (d
g rate, f
Rate
efault)
Bit 3
ADOSR
S
. The base sampling rate is determined by the operating
ors the converter sampling rates set in this register.
Bit 2
Sampling Rate (f
48 kHz, base (default)
8 kHz
12 kHz
16 kHz
24 kHz
32 kHz
96 kHz
Bit 1
CONVSR[2:0]
S
= 48 kHz)
ADAU1361
Bit 0

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