adau1373 Analog Devices, Inc., adau1373 Datasheet - Page 70

• Manufacturer Part Number: adau1373
• Description: Low Power Codec With Speaker And Headphone Amplifier Adau1373
• Manufacturer: Analog Devices, Inc.

ADAU1373
CONTROL PORTS
The ADAU1373 has a 2-wire I
be used to set the registers. The control port is capable of full
read/write operation for all addressable registers. Operations
such as mute and input/output mode control are programmed
by writing to these registers.
All addresses can be accessed in either single-address mode or
burst mode. The first byte (Byte 1) of a control port write contains
the 7-bit chip address plus the R/ W bit. The next byte (Byte 2)
forms the subaddress of the register location within the
ADAU1373. This subaddress must be a single byte long. All
subsequent bytes (starting with Byte 3) contain the data to be
written to the register. The number of bytes per word depends
on the type of data that is being written.
The ADAU1373 provides several mechanisms for updating
signal processing parameters in real time without causing
pops or clicks.
The function of each of the two control port pins (SCL and SDA)
is described in Table 31.
Table 31. Control Port Pin Functions
Pin Name
SCL
SDA
Table 32. I
Bit 0
0
2
C Address and Read/ Write Byte Format
I
Input clock
Open-collector input/output
Bit 1
0
2
C Mode
2
C bus control port, which can
Bit 2
1
Bit 3
1
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Bit 4
0
I
The ADAU1373 supports a 2-wire serial (I
microprocessor bus that drives multiple peripherals. Two pins,
serial data (SDA) and serial clock (SCL), carry information
between the ADAU1373 and the system I
In I
meaning that it cannot initiate a data transfer. Each slave device
is recognized by a unique address. The address and R/ W byte
format is shown in
seven bits of the I
is 0x1A. The LSB of the address (the R/
a read or write operation. A Logic 1 corresponds to a read
operation, and a Logic 0 corresponds to a write operation.
Burst mode addressing, where the subaddresses are automati-
cally incremented at word boundaries, can be used for writing
large amounts of data to contiguous registers. This increment
happens automatically after a single word write unless a stop
condition is encountered. A data transfer is always terminated
by a stop condition.
The SDA and SCL pins should each have a 2 kΩ pull-up resistor
to IOVDD5 (1.8 V to 3.3 V).
2
C PORT
2
C mode, the ADAU1373 is always a slave on the bus,
Bit 5
1
2
C write. The I
Table 32
. The address resides in the first
Bit 6
0
2
C address for the ADAU1373
W bit) specifies either
2
C master controller.
2
C-compatible)
Bit 7
R/W