ucb1400 NXP Semiconductors, ucb1400 Datasheet - Page 10

• Manufacturer Part Number: ucb1400
• Description: Audio Codec With Touch Screen Controller And Power Management Monitor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 09611
Product data
8.3.3 AC-link audio input frame (SDATA_IN)
Slot 2: Command data port:
control register write data in the event that the current command port operation is a
write cycle (as indicated by Slot 1, bit 19).
If the current command port operation is a read, then the entire slot time must be
stuffed with 0s by the AC ’97 Controller.
Slot 3: PCM playback left channel:
digital audio left playback stream. Typically, this slot is composed of standard
PCM (.wav) output samples digitally mixed (on the AC ’97 Controller or host
processor) with music synthesis output samples. If a sample stream of resolution less
than 20 bits is transferred, the AC ’97 Controller must stuff all trailing non-valid bit
positions within this time slot with 0s.
Slot 4: PCM playback right channel:
digital audio right playback stream. Typically, this slot is composed of standard
PCM (.wav) output samples digitally mixed (on the AC ’97 Controller or host
processor) with music synthesis output samples. If a sample stream of resolution less
than 20 bits is transferred, the AC ’97 Controller must stuff all trailing non-valid bit
positions within this time slot with 0s.
Slots 5 through 12:
The audio input frame data streams correspond to the multiplexed bundles of all
digital input data targeting the AC ’97 Controller. As is the case for audio output
frame, each AC-link audio input frame consists of 12, 20-bit time slots. Slot 0 is a
special reserved time slot containing 16 bits, which are used for AC-link protocol
infrastructure.
Slot 0: TAG:
flags whether UCB1400 is in the ‘Codec Ready’ state or not. If the ‘Codec Ready’ bit
is a 0, this indicates that UCB1400 is not ready for normal operation. This condition is
normal following the deassertion of power-on reset, for example, while UCB1400’s
voltage references settle. When the AC-link ‘Codec Ready’ indicator bit is a logic 1, it
indicates that the AC-link and UCB1400 control and status registers are in a fully
operational state. The AC ’97 Controller must further probe the Power-down
Control/Status Register (0x26) to determine exactly which subsections, if any, are
ready.
Prior to any attempts at putting UCB1400 into operation, the AC ’97 Controller should
poll the first bit in the audio input frame (SDATA_IN slot 0, bit 15) for an indication that
the UCB1400 has gone ‘Codec Ready’. Once the UCB1400 is sampled ‘Codec
Ready’ then the next 12 bit positions sampled by the AC ’97 Controller indicate which
of the corresponding 12 time slots are assigned to input data streams, and that they
contain valid data.
•
•
Bit(19:4) Control Register Write Data (stuffed with 0s if current operation is a read).
Bit(3:0) Reserved (stuffed with 0s)
Within slot 0, the first bit is a global bit (SDATA_IN slot 0, bit 15) which
Rev. 02 — 21 June 2002
Figure 8
All other audio output frame slots are ignored by the UCB1400.
illustrates the time slot based AC-link protocol.
The command data port is used to deliver 16-bit
Audio output frame slot 3 is the composite
Audio output frame slot 4 is the composite
Audio codec with touch screen controller
and power management monitor
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
UCB1400
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