mc33981bpna/r2 Freescale Semiconductor, Inc, mc33981bpna/r2 Datasheet - Page 14

• Manufacturer Part Number: mc33981bpna/r2
• Description: Single High-side Switch 4.0 M , Pwm Clock Up To 60khz
• Manufacturer: Freescale Semiconductor, Inc

V
internal current source is disconnected and OCLS goes to
0 V. The GLS pin and the OCLS pin are reset (and the fault
is delatched) by a logic [0] at the INLS pin for at least
t
behavior in case of overload on Low Side Gate driver.
its internal current source sets the V
the external resistance, the protection level can be adjusted
depending on low-side characteristics. A 33kΩ resistor gives
a V
drain of the low side (DLS pin) and the 33981 ground (GND
pin). For this reason it is key that the low-side source, the
33981 ground, and the external resistance ground
connection are connected together in order to prevent false
error detection due to ground shifts.
on DLS must be used to detect a higher voltage across the
low side.
CONFIGURATION
the internal MOSFET and the external low-side MOSFET.
With the CONF pin at 0 V, the two MOSFETs can be
independently controlled. A load can be placed between the
high side and the low side.
on at the same time. They are in half-bridge configuration as
shown in the simplified application diagram on
INHS and INLS are at 5.0 V at the same time, INHS has
priority and OUT will be at V
to 0 V with INLS at 5.0 V, GLS will go to high state as soon
as the V
typically. A half-bridge application could consist in sending
PWM signal to the INHS pin and 5.0 V to the INLS pin with
the CONF pin at 5.0 V.
diagram on
The CONF and INLS pins are at 5.0 V. When INHS is at
5.0 V, current is flowing in the motor. When INHS goes to 0 V,
the load current recirculates in the external low side.
BOOTSTRAP SUPPLY
capacitor through the V
the application of power to the device to charge the bootstrap
capacitor.
internal charge pump allows continuous MOSFET drive.
When the device is in the sleep mode, this bootstrap supply
is off to minimize current consumption.
14
33981
FUNCTIONAL DEVICE OPERATION
PROTECTION AND DIAGNOSTIC FEATURES
RST(diag)
DLS
When connected to an external resistor, the OCLS pin with
This protection circuitry measures the voltage between the
The maximum OCLS voltage being 4.0V, a resistor bridge
The CONF pin manages the cross-conduction between
With the CONF pin at 5.0 V, the two MOSFETs cannot be
Figure 20, page 22
Bootstrap supply provides current to charge the bootstrap
DS
> V
level of 3.3 V typical.
GS
.
OCLS
Figure 13, page 17
A typical value for this capacitor is 100 nF. An
of the internal MOSFET is lower than 2.0 V
page 1
, the GLS pin goes to 0 V and the OCLS
with a DC motor and external low side.
, illustrates the simplified application
PWR
and
PWR
pin. A short time is required after
Figure 14, page 18
. If INHS changes from 5.0 V
OCLS
level. By changing
page
illustrate the
1. If
HIGH-SIDE GATE DRIVER
voltage to the gate of the MOSFET. The driver circuit has a
low-impedance drive to ensure that the MOSFET remains
OFF in the presence of fast falling dV/dt transients on the
OUT pin.
supply and the C
drive the device. The voltage across this capacitor is limited
to about 13 V typical.
GND is used to control the slew rate at the OUT pin.
page 10
versus different SR capacitors.
LOW-SIDE GATE DRIVER
a standard MOSFET with an R
frequency up to 60 kHz. The V
12 V typically to protect the gate of the MOSFET. The GLS
pin is protected against short by a local over temperature
sensor.
THERMAL FEEDBACK
provides a value in inverse proportion to the temperature of
the GND flag (pin 13). The controlling microcontroller can
“read” the temperature proportional voltage with its analog-
to- digital converter (ADC). This can be used to provide real-
time monitoring of the PC board temperature to optimize the
motor speed and to protect the whole electronic system.
TEMP pin value is V
coefficient of
REVERSE BATTERY
voltage as low as -16 V. Under these conditions, the output’s
gate is enhanced to decrease device power dissipation. No
additional passive components are required. The 33981
survives these conditions until the maximum junction rating is
reached.
a direct current passes through the external freewheeling
diode and the internal high-side.
line. The proposed solution is an external N-channel low-side
with its gate tied to battery voltage through a resistor. A
high-side in the V
The high-side gate driver switches the bootstrap capacitor
This bootstrap capacitor connected between the power
An external capacitor connected between pins SR and
The low-side control circuitry is PWM capable. It can drive
The 33981 has an analog feedback output (TEMP pin) that
The 33981 survives the application of reverse battery
In the case of reverse battery in a half-bridge application,
As
Figure 11
and
Figure 10, page 11
DT
shows, it is essential to protect this power
FEED
BOOT
PWR
TFEED
.
line could be another solution.
pin provides the
Analog Integrated Circuit Device Data
with a negative temperature
give Vout rise and fall time
DS(ON)
GS
is internally clamped at
Freescale Semiconductor
as low as 10.0 mΩ at a
h
igh pulse current to
Figure 9,