s1r72v03 Epson Electronics America, Inc., s1r72v03 Datasheet
s1r72v03
Manufacturer Part Number
s1r72v03
Description
Usb2.0 Device Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1R72V03.pdf
(2 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
s1r72v03F00A200
Manufacturer:
EPSON
Quantity:
9 737
Part Number:
s1r72v03F00A200
Manufacturer:
EPSON/爱普生
Quantity:
20 000
EPSON
USB2.0 device controller
■ ■ ■ ■ Description
■ ■ ■ ■ Features
■ ■ ■ ■ List of specification
The S1R72V03 is a USB device controller LSI that supports the USB2.0-compliant
High/Full speed modes. This device also includes IDE master controller for HDD.
High speed CPU I/F
Low power consumption
Small size package (Ball Grid Array)
USB
IDE
CPU I/F
Others
Technology.
High-speed data transfer is possible between IDE device and system bus.
Low power is made possible by our 0.18um process technology and pow
er management.
Reduce 70% of power consumption compare to our 0.35um process
Acting time (160mW), stand-by time (below 1.2mW)
(It is the measured value in our evaluation environment.)
BUS power operation
Supports HS (480Mbps) / FS (12Mbps) transfer modes
Endpoints: Bulk OUT/IN x 1 each, Interrupt IN x 1 each and Endpoint0
Has built-in HS/FS termination
Has a built-in 2.5kB programmable FIFO for Endpoints
UATA100
PIO mode 0 to 4, UDMA mode 0 to 5
16bit/8bit
DMA (2 ch)
Has built-in Oscillator circuit and feedback resistance
(fosc=24MHz crystal oscillator)
Dual supply voltages: 3.3V / 1.5V to 1.8V
PFBGA-100pin (7mm x 7mm, 0.65mm pitch, full grid)
Operative temperature range –40℃ ℃ ℃ ℃ to 85℃ ℃ ℃ ℃
SEIKO EPSON CORPORATION
● ● ● ● 0.18um CMOS process technology
● ● ● ● USB2.0 HS/FS modes support
S1R72V03
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s1r72v03 Summary of contents
Page 1
... EPSON USB2.0 device controller ■ ■ ■ ■ Description The S1R72V03 is a USB device controller LSI that supports the USB2.0-compliant High/Full speed modes. This device also includes IDE master controller for HDD. ■ ■ ■ ■ Features High speed CPU I/F High-speed data transfer is possible between IDE device and system bus ...
Page 2
CPU I/F Controller HDD[15:0] HDMARQ xHDMACK xHIOR xHIOW IDE xHCS[1:0] Master HDA[2:0] Controller HIORDY HINTRQ Endpoint xHRESET (xHDASP) (xHPDIAG) FIFO Controller FIFO DMA Controller VBUS VBUSEN DP DM SIE UTM Test Mux ...