74vcxh162374 Fairchild Semiconductor, 74vcxh162374 Datasheet
74vcxh162374
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74vcxh162374 Summary of contents
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... The 74VCXH162374 is also designed with 26 resistors in the outputs. This design reduces line noise in applications such as memory address drivers, clock drivers and bus transceivers/transmitters. The 74VCXH162374 is designed for low voltage (1.65V to 3.6V) V applications with output compatibility up to 3.6V. CC The 74VCXH162374 is fabricated with an advanced CMOS technology to achieve high speed operation while maintain- ing low CMOS power dissipation ...
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... Connection Diagram Functional Description The 74VCXH162374 consists of sixteen edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The device is byte controlled with each byte func- tioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. ...
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Absolute Maximum Ratings Supply Voltage ( Input Voltage ( – Output Voltage ( Outputs 3-STATED Outputs Active (Note 3) 0.5V to ...
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DC Electrical Characteristics (2.3V Symbol Parameter V HIGH Level Input Voltage IH V LOW Level Input Voltage IL V HIGH Level Output Voltage OH V LOW Level Output Voltage OL I Input Leakage Current Control Pins I Data Pins I ...
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AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX Prop Delay PHL PLH Output Enable Time PZL PZH Output Disable Time PLZ PHZ t Setup Time ...
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AC Loading and Waveforms TEST PLH PHL PZL PLZ PZH PHZ FIGURE 2. Waveform for Inverting and Non-Inverting Functions FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage ...
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Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Body Width Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...