74vcxf162835 ETC-unknow, 74vcxf162835 Datasheet
74vcxf162835
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74vcxf162835 Summary of contents
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... The VCXF162835 is designed with 26 series resistors in the outputs. This design reduces noise in applications such as memory address drivers, clock drivers, and bus trans- ceivers/transmitters. The 74VCXF162835 is designed for low voltage (1.65V to 3.6V) V applications with I/O capability up to 3.6V. CC The 74VCXF162835 is fabricated with an advanced CMOS technology to achieve high speed operation while maintain- ing low CMOS power dissipation ...
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Connection Diagram Logic Diagram www.fairchildsemi.com Pin Descriptions Pin Names Description OE Output Enable Input (Active LOW) LE Latch Enable Input CLK Clock Input Data Inputs 3-STATE Outputs 1 18 Truth Table Inputs ...
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Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage ( Outputs 3-STATE Outputs Active (Note 5) 0. Input Diode Current ( 0.5V ...
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DC Electrical Characteristics (2.3V Symbol Parameter V HIGH Level Input Voltage IH V LOW Level Input Voltage IL V HIGH Level Output Voltage OH V LOW Level Output Voltage OL I Input Leakage Current I I 3-STATE Output Leakage OZ ...
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AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX Propagation Delay PHL PLH Bus to Bus Propagation Delay PHL PLH Clock to Bus Propagation Delay PHL PLH LE to Bus ...
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Capacitance Symbol Parameter C Input Capacitance IN C Input/Output Capacitance I/O C Power Dissipation Capacitance Characteristics OUT OUT FIGURE 1. Characteristics for Output - Pull Up Drive FIGURE 2. Characteristics for Output - Pull Down Driver ...
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AC Loading and Waveforms TEST PLH PHL PZL PLZ PZH PHZ FIGURE 4. Waveform for Inverting and Non-inverting Functions t t 2.0ns, 10 FIGURE 6. 3-STATE Output ...
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Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the ...