iso1h815 Infineon Technologies Corporation, iso1h815 Datasheet - Page 9

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iso1h815

Manufacturer Part Number
iso1h815
Description
Coreless Transformer Isolated Digital Output 8 Channel 1.2a High-side Switch
Manufacturer
Infineon Technologies Corporation
Datasheet

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3.5
The ISO1H815G contains a parallel interface that can
be directly controlled by the microcontroller output
ports. The parallel interface can also be switched over
to a direct control that allows direct changes of the
outputs OUT0 ... OUT7 by means of the corresponding
inputs D0 ... D7 without additional logic signals. To
activate the parallel direct control mode pin CS and pin
WR have to be connected both to ground.
3.5.1
CS - Chip select. The system microcontroller selects
the ISO1H815G by means of the CS pin. Whenever the
pin is in a logic low state, data can be transferred from
the µC.
CS High to low transition:
CS Low to high transition:
WR - Write. The system controller enables the write
procedure in the ISO1H815G by means of the signal
WR. A logic low state signal at pin WR writes the input
data into the input latches when the CS pin is in a logic
low state.
WR Logic low level:
WR Logic high level:
D0 ... D7 - Parallel input. Parallel data bits are fed into
the pins D0 ... D7. The data is written into the input
latches when WR is logic low.
Preliminary Datasheet
Parallel input data can be written in from then on
The data in the input latches is transferred to the
output buffer
Parallel input data at the pins D0 - D7 is written into
the input latches
The parallel input data is latched in the input
latches. Any changes at the pins D0 - D7 after the
low-to-high transition of WR do not affect the input
latches.
Parallel Interface
Parallel Interface Signal
Description
9
3.5.2
Figure 9
3.5.3
Beside the use of the parallel µC compatible interface a
parallel direct control mode can be choosen. In this
mode the output OUT0...OUT7 can be directly
controlled via the inputs D0...D7 without the need for
additional logic signals. To activate this mode pin CS
and WR need to be connected to ground.
.
Figure 10
µC (i.e C166)
Controller
VCC
AD0
Number of adressed ICs = n
Number of necessary control and data ports = 9 n
Individual ICs are adressed by the chip select
WR
VCC
P0
P1
P2
P3
P4
P5
P6
P7
P0
P1
P2
P3
P4
P5
P6
P7
uC Control Mode
Parallel bus configuration
Direct Control Mode
Parallel Direct Control
Functional Description
Version 1.0, 2009-05-28
IC1
IC1
CS
WR
D0
D1
D2
D3
D4
D5
D6
D7
DIAG
VCC
CS
WR
D0
D1
D2
D3
D4
D5
D6
D7
DIAG
Parallel
Interface
Parallel
Interface
ISOFACE
ISO1H815G
Output lines
Output lines
TM

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