stdve001a STMicroelectronics, stdve001a Datasheet
stdve001a
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stdve001a Summary of contents
Page 1
... The device can be placed in a low-power mode by disabling the output current drivers. The STDVE001A is ideal for advanced TV and STB applications supporting HDMI/DVI standard. The differential signal from the HDMI/DVI ports can be routed through the STDVE001A to guarantee good signal quality at the HDMI receiver ...
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... DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.3 DC electrical characteristics (I2C repeater 4.4 DC electrical characteristics (CEC 4.5 Dynamic switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.6 Dynamic switching characteristics (I2C repeater Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 5.1 Power supply sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 5.2 Power supply requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 5.3 Differential traces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 5.3.1 6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 2/49 I2C lines application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 STDVE001A ...
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... STDVE001A List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 3. Adaptive equalizer gain with frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 4. OE_N operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 5. Bias parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 6. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 7. Thermal data Table 8. Power supply characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 9. DC specifications for TMDS differential inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 10. ...
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... DDC I2C bus repeater . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4. STDVE001A in a digital TV Figure 5. Pin configuration (TQFP48 package Figure 6. Pin configuration (QFN48 package Figure 7. STDVE001A gain vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 8. Test circuit for electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 9. TMDS output driver Figure 10. Test circuit for HDMI receiver and driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 11. ...
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... STDVE001A 1 Block diagram Figure 1. STDVE001A block diagram Block diagram 5/49 ...
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... Block diagram Figure 2. Equalizer functional diagram (one signal pair) 50 Ω Termination Selectable Figure 3. DDC I 6/49 OE_N Pre-Amp OE_N Output current control REXT 2 C bus repeater STDVE001A EQ_BOOST 1, 2 PRE Output I Equalizer Quantizer Driver Data+ Data- AM00720V2 ...
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... STDVE001A 1.1 Application diagrams Figure 4. STDVE001A in a digital TV Block diagram 7/49 ...
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... Pin configuration 2 Pin configuration Figure 5. Pin configuration (TQFP48 package) 8/49 STDVE001A ...
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... STDVE001A Figure 6. Pin configuration (QFN48 package) GND IN_D1- IN_D1+ VCC IN_D2- IN_D2+ GND IN_D3- IN_D3+ VCC IN_D4- IN_D4 QFN- Pin configuration GND 24 23 OUT_D1- 22 OUT_D1+ VCC 21 20 OUT_D2- OUT_D2 GND 17 OUT_D3- 16 OUT_D3+ 15 VCC 14 OUT_D4- 13 OUT_D4+ ...
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... OUT_D3+. GND Power Ground HDMI 1.3 compliant TMDS output. OUT_D2+ makes a Output differential output signal with OUT_D2-. HDMI 1.3 compliant TMDS output. OUT_D2- makes a Output differential output signal with OUT_D2+. VCC Power 3.3V±10% DC supply STDVE001A Function PRE Output de-emphasis 3 ...
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... STDVE001A Table 2. Pin description (continued) Pin number Pin name 22 OUT_D1+ 23 OUT_D1 VDD_INT 27 28 SCL_INT 29 SDA_INT 30 HPD_INT 31 32 DDC_EN 33 Type HDMI 1.3 compliant TMDS output. OUT_D1+ makes a Output differential output signal with OUT_D1-. HDMI 1.3 compliant TMDS output. OUT_D1- makes a Output differential output signal with OUT_D1+. ...
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... IN_D3-. VCC Power 3.3V±10% DC supply HDMI 1.3 compliant TMDS input. IN_D4- makes a IN_D4- Input differential pair with IN_D4+. HDMI 1.3 compliant TMDS input. IN_D4+ makes a IN_D4+ Input differential pair with IN_D4-. STDVE001A Function EQ_BOOST Setting at 825 MHz ...
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... The device conforms to the TMDS standard on both inputs and outputs. The low on-resistance and low I/O capacitance of the switch in STDVE001A result in a very small propagation delay. Additionally, it supports the DDC, HPD and CEC signaling. ...
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... The STDVE001A produces TMDS output levels for point-to-point links that are doubly terminated (100 the STDVE001A produces an output voltage of 3.3 – 0 2.8 V when driving a termination line terminated at each end. The input terminations are selectable thus saving power for the unselected ports. ...
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... STDVE001A TMDS voltage levels The TMDS interface standard is a signaling method intended for point-to-point communication over a tightly controlled impedance medium. The TMDS standard uses a lower voltage swing than other common communication standards, achieving higher data rates with reduced power consumption while reducing EMI emissions and system susceptibility to noise ...
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... V from the HDMI source. 3.4 DDC channels The DDC channels are designed together with a bi-directional buffer ensure the voltage levels on the I eliminates the errors during EDID and HDCP reading. 16/ lines are met even after long capacitive cables. This feature STDVE001A ...
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... I buses, one and the other at 3 400 kHz and 100 kHz bus, where the 100 kHz bus is isolated when 400 kHz operation of the other bus is required. The STDVE001A can be used to run the I The DDC_EN acts as the enable for the DDC buffer. The DDC_EN line should not change ...
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... HDMI output is within drive ≤ 600 mV with typical value centered at 500 mV DDC interface is ready by the time the HPD detection is STDVE001A reference resistor sets the internal EXT value is within the ±1% EXT Max Unit ...
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... STDVE001A 3.9 CEC The CEC channel is a dedicated single pin bus and electrically translates to a bi-directional buffer used to ensure that the electrical specs of the CEC are met even with high capacitance on the single CEC line. The pull-up resistor of 26K? is integrated on either sides of the buffer ...
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... STG Lead temperature (10 sec Electrostatic discharge voltage on all IOs V ESD Table 7. Thermal data Symbol Θ Thermal coefficient (junction-ambient) JA 20/49 Parameter Contact discharge as per IEC61000- 4-2 standard Parameter STDVE001A Value -0.5 to +4.0 1.7 to +4.0 -0.5 to +4.0 -0.5 to +6.0 120 -65 to +150 300 ±8 TQFP48 Unit QFN48 48 °C/W Unit ...
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... STDVE001A 4.1 Recommended operating conditions 4.2 DC electrical characteristics T = -40 to +85 ° Table 8. Power supply characteristics Symbol Parameter V Supply voltage CC I Supply current CC Table 9. DC specifications for TMDS differential inputs Symbol Parameter Differential input high V threshold TH (peak-to-peak) Differential input low V TL threshold ...
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... R TERM 800 = 50 Ω R TERM 0 8 OUT± = GND through a 50 Ω resistor. See Figure 12 OUT+ or OUT- to GND when tri- state MHz STDVE001A Value Unit Typ Max V + -400 mV CC 500 600 mV 1000 1200 mV 50 µ ...
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... STDVE001A Table 11. DC specifications for OE_N, EQ_BOOST, EQ_BOOST2, PRE, DDC_EN inputs Symbol Parameter V HIGH level input voltage IH V LOW level input voltage IL V Clamp diode voltage IK I Input high current IH I Input low current IL C Input capacitance IN Table 12. Input termination resistor ...
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... Input/output capacitance I/O 24/49 Test condition Min V = 3.465 V CC Input port= 5.3 V Output port = 0.0 V Switch is isolated V = 3.465 V CC Input port = 3.3 V Output port = 0.0 V Switch is isolated MHz Switch disabled MHz Switch enabled STDVE001A Value Unit Typ Max 6 µA 2 µ ...
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... STDVE001A Table 15. Status pins (HPD_INT) Symbol Parameter V High level input voltage IH V Low level input voltage IL I Input leakage current I(leak) Table 16. Status pins ( HPD_EXT) Symbol Parameter V Voltage C Input/output capacitance I/O Output low voltage V OL (open drain I/Os) 1. Typical parameters are measured at V Test condition ...
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... V = 3.6 V; − O driver disabled V = 5.3 V; − O driver disabled − for the second and subsequent low levels seen ILc = 0 V. The STDVE001A should be used in applications where power is CC STDVE001A Value Unit Typ Max 3.3 3.465 V Value Unit Typ Max 5.3 V ...
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... STDVE001A 4.4 DC electrical characteristics (CEC) (TA = -40 to +85 °C, VCC = 3.3V ± 5%, GND=0V; unless otherwise specified) Table 19. DC electrical characteristics (CEC) Symbol DC supply voltage V CC Logic 0 output V OL Logic 1 output V OH High to low input V V HL(th) treshold for logic ‘0’ Low to high input V V LH(th) treshold for logic ‘ ...
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... Measure at 50 between input to output Test condition Min | PLH PHL Difference in propagation delay ( PLH PHL among all output channels STDVE001A ( pF). L Value Min Typ Max 25 340 3.4 Value Min Typ Max 75 150 240 75 150 240 ...
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... STDVE001A Table 23. Turn-on and turn-off times Symbol Parameter TMDS output enable t ON time TMDS output disable t OFF time Table 24. DDC I/O pins Symbol Parameter Table 25. Status pins (HPD_INT, HPD_EXT, OE_N Symbol Parameter Propagation delay t (from Y_HPD to the PD(HPD) active port of HPD) Switch time ...
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... Depends on input signal rise time. Includes the 20 % time intervals on both transitions. 400 KHz See Figure 20 Voltage on line = 3.3 V, Cmax = 400 pF, Rmax = 2 K Depends on input signal rise time. Includes the 20 % time intervals on both transitions. STDVE001A 2 C repeater) Value Min Typ Max 100 400 4.7 1.3 4 ...
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... STDVE001A 2 (1) Table 27 repeater (continued) Symbol Parameter t High duration on SCL pin HIGH t High duration on SCL pin HIGH t Propagation delay PHL t Propagation delay PLH t Propagation delay PHL Test condition 100 KHz See Figure 20 Voltage on line = 5 V Cmax = 400 pF, Rmax = 2 K Depends on input signal rise time. ...
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... Waveform 1 Voltage 3.3 V Cmax = 400pF, Rmax = 2 K 100 KHz (2) Waveform 1 (Figure 18) Voltage on line = 5 V Cmax = 400 pF, Rmax = 2 K 100 KHz (2) Waveform 1 (Figure 18) Voltage on line = 3.3 V Cmax = 400 pF, Rmax = 2 K STDVE001A Value Unit Min Typ Max 450 ns 250 ns 300 ns 250 ns 450 ns 300 ...
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... STDVE001A 2 (1) Table 27 repeater (continued) Symbol Parameter t Output rise time r t Output rise time r 1. All the timing values are tested during characterization and are guaranteed by design and simulation. Not tested in production. 2. The t transition time is specified with maximum load of 2 kΩ pull-up resistance and 400 pF load capacitance. Different load r resistance and capacitance will alter the RC time constant, thereby changing the propagation delay and transition times ...
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... termination resistance: should be equal 34/49 V IN+ V IN- STDVE001A the pulse generator. OUT the cable. Both are equal STDVE001A OUT+ 100 Ω V OUT TMDS receiver . W AM00726V1 CS00069 ...
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... STDVE001A Figure 10. Test circuit for HDMI receiver and driver Ω TMDS TMDS receiver driver = Maximum rating 0.5pF Swing CS00071 35/49 ...
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... V 1.0 V 1.15 V 1.0 V Pulse generator Figure 12. Test circuit for short circuit output current 36/ VIN+ STDVE001A VIN- SHDN_N REXT GND 4.7 KΩ ±1% 50 Ω 50 Ω TMDS driver 50 Ω STDVE001A 10 μF 0.1 μF 0.01 μ Ω 1 Ω AM00727V1 3.465 V ...
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... STDVE001A Figure 13. Propagation delays VA VCM Output Figure 14. Turn-on and turn-off times VCM V ID(p-p) V OD(O) tpLH 80% V OD(p-p) 20% tr SHDN_N 1. OFF V when V = +150mV OUT+ ID 50% V when V = -150mV OUT OFF when V = -150mV OUT+ ID when V = +150mV OUT- ID 50% Maximum rating VCC VCC – ...
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... Maximum rating Figure 15. TSK(O) Data In Data Out at Port 0 Data Out at Port 1 Figure 16. TSK(P) Figure 17. TSK(D) 38/49 tpLHX tpHLX 2.5V tpLHY tSK( tpLHy – tpLHx | or | tpHLy – tpHLx | STDVE001A 3.5V 2. tSK( 2. tpHLY ...
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... STDVE001A Figure 18. AC waveform 1 (I Figure 19. Test circuit for AC measurements (I 2 Figure 20 bus timing 2 C lines lines) Maximum rating 39/49 ...
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... Maintain 100-Ω differential transmission line impedance into and out of the STDVE001A. (b) Keep an uninterrupted ground plane below the high-speed I/Os. (c) Keep the ground-path vias to the device as close as possible to allow the shortest return current path ...
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... Master devices can be placed on either bus. Figure 21. Typical application of I Bus master 400 kHz The STDVE001A DDC lines are 5 V tolerant does not require any extra circuitry to translate between the different bus voltages. 2 C-bus while the slave is connected bus. Both buses run at ...
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... JEDEC standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK trademark. ECOPACK specifications are available at: Figure 22. TQFP48 42/49 www.st.com mm) package outline STDVE001A ® ...
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... STDVE001A Table 29. TQFP48 ( mm) mechanical data Symbol ccc / ddd Package mechanical data Millimeters Min Typ 0.05 0.10 0.95 1.00 8.80 9.00 6.90 7.00 8.80 9.00 6.90 7.00 0.45 0.60 1.00 0.70 0.15 0.10 0.13 0° 0.17 0.22 0.17 0.20 0.500 0.08 Max 0.15 1.05 9.20 7.10 9.20 7.10 0.75 0.20 1.15 7° 0.27 0.23 43/49 ...
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... Package mechanical data Figure 23. TQFP48 ( mm) footprint recommendation 44/49 STDVE001A ...
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... STDVE001A Figure 24. TQFP48 ( mm) tape and reel information Package mechanical data 45/49 ...
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... Package mechanical data Figure 25. QFN48 ( mm) package outline 46/49 STDVE001A ...
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... STDVE001A Table 30. QFN48 ( mm) package mechanical data Symbol ddd Millimeters Min Typ 0.80 0.90 0.02 0.65 0.25 0.18 0.23 6.85 7.00 2.25 4.70 6.85 7.00 2.25 4.70 0.45 0.50 0.30 0.40 Package mechanical data Max 1.00 0.05 1.00 0.30 7.15 5.25 7.15 5.25 0.55 0.50 0.08 47/49 ...
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... Revision history 7 Revision history Table 31. Document revision history Date 02-Jul-2008 21-Jul-2008 48/49 Revision 1 Initial release. Modified: Figure 2 and 2 Replaced ‘equation’ with ‘equalizer in the Features section. STDVE001A Changes Section 3: Functional description on page 13 ...
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... STDVE001A Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...