pxb4340e Infineon Technologies Corporation, pxb4340e Datasheet - Page 98

• Manufacturer Part Number: pxb4340e
• Description: Atm Oam Processor Aop
• Manufacturer: Infineon Technologies Corporation

Data Sheet
Bit 31
Bit 30
Bit 29
Bit 28
Bit 27
Bit 26
Bit 25
3 31 30 29 28
2 31
1 31
0 31 30 29 28 27 26 25 24 23 22 21 20 19
CEDCID(6:0)
CTSDCID(6:0)
PAR
Dword parity protection. In normal operation write to 0. Should always
read as 0.
CPMTEN
Enable a Terminating F5 Segment or End-to-End FM flow. Flow type
selected with PMFT in PM RAM entry. Related identifier CPMTID in
Dword3.
CPMOEN
Enable an Originating F5 Segment or End-to-End FM flow. Flow type
selected with PMFT in PM RAM entry. Related identifier CPMOID in
Dword3.
CLBS
F5 Loopback State according to I.610. Should be set before inserting a
LB cell, cleared after reception of the looped cell.
CSRCIDEN
Loopback of F5 LB cells using LB source ID
1
CLOCIDEN
Loopback of F5 LB cells using LB location ID
1
ACDEAC
Treatment of Activation/Deactivation cells at their destination points:
0
1
30..15
Enabled. Normally this bit is =0 as the location ID is used
to detect intra-domain LB cells.
Enabled. Normally this bit is =1 as according to the
standard the location ID is used to detect intra-domain LB
cells
Discard (if Activation/ Deactivation function is not used)
Extract to receive buffer (if Activation/ Deactivation is
supported)
19 18 17 16 15 14 13 12
CSDCID(6:0)
3-98
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
LCI2(13:0)
CPMTID(6:0)
11..7
6 5 4
CPMOID(6:0)
PN(4:0)
3..0
04.2000