w83977atg Winbond Electronics Corp America, w83977atg Datasheet - Page 68

• Manufacturer Part Number: w83977atg
• Description: W83877tf Plus Kbc, Gp I/o, Wake-up, Fir, Cir, Pb-free
• Manufacturer: Winbond Electronics Corp America

7.2.7
7.2.8
Legacy IR Register:
This is a temporary register that can be accessed and defined by the user.
Advanced IR Register:
Bit 7
Bit 6
Bit 5
Bit 4:
Bit 3
Bit 2:
Legacy IR
Advanced
MODE
Reset
Value
IR
Set0.Reg6 - Reserved
Set0.Reg7 - User Defined Register (UDR/AUDR)
MIR, FIR Modes:
MIR, FIR Modes:
MIR, FIR Modes:
Remote IR mode:
MIR, FIR modes:
Remote IR Modes:
MIR, FIR Modes:
FLC_ACT
FLC_ACT - Flow Control Active
Set to 1 when the flow control occurs. Cleared to 0 when this register is read. Note that
this will be affected by Set5.Reg2 which controls the SIR mode switches to MIR/FIR
mode or MIR/FIR mode operated in DMA function switches to SIR mode.
UNDRN - Underrun
Set to 1 when transmitter is empty and S_FEND (bit 3 of this register) is not set in PIO
mode or no TC (Terminal Count) in DMA mode. Cleared to 0 after a write to 1.
RX_BSY - Receiver Busy
Set to 1 when receiver is busy or active in process.
RX_IP - Receiver in Process
Set to 1 when receiver is in process.
LST_FE - Lost Frame End
Set to 1 when a frame end in a entire frame is lost. Cleared to 0 when this register is
read.
RX_PD - Receiver Pulse Detected
Set to 1 when one or more remote pulses are detected. Cleared to 0 when this register
is read.
S_FEND - Set a Frame End
Set to 1 when trying to terminate the frame, that is, the procedure od PIO command is
An Entire Frame = Write Frame Data (First) + Write S_FEND (Last)
This bit should be set to 1, if used in PIO mode, to avoid transmitter underrun. Note that
setting S_FEND to 1 is equivalent to TC (Terminal Count) in DMA mode. Therefore, this
bit should be set to 0 in DMA mode.
Reserved.
BIT 7
Bit 7
0
UNDRN
BIT 6
Bit 6
0
RX_BSY/
RX_IP
BIT 5
Bit 5
0
- 60 -
LST_FE/
RX_PD
BIT 4
Bit 4
0
W83977ATF/W83977ATG
S_FEND
BIT 3
Bit 3
0
BIT 2
Bit 2
0
0
LB_SF
BIT 1
Bit 1
0
RX_TO
BIT 0
Bit 0
0