tea1752t NXP Semiconductors, tea1752t Datasheet
tea1752t
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tea1752t Summary of contents
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... General description The GreenChip III is the third generation of green Switched Mode Power Supply (SMPS) controller ICs. The TEA1752T and TEA1752LT combine a controller for Power Factor Correction (PFC) and a flyback controller. The high level of integration facilitates the design of a cost-effective power supply using a minimum number of external components. ...
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... Mains voltage independent OverPower Protection (OPP) (NXP Semiconductors patented, patent number: US6542386) Open control loop protection for both converters. The open-loop protection on the flyback converter is latched on the TEA1752LT and safe restart on the TEA1752T IC overtemperature protection Low and adjustable OverCurrent Protection (OCP) trip level for both converters General purpose input for latched protection, e ...
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... TEA1752LT SO16 plastic small outline package; 16 leads; body width 3.9 mm TEA1752T_LT Product data sheet TEA1752T; TEA1752LT All information provided in this document is subject to legal disclaimers. Rev. 02 — 24 June 2010 GreenChip III SMPS control IC Version SOT109-1 SOT109-1 © ...
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... SOFT STOP TIMER 4 μs VALLEY DETECT PFCAUX 8 PFC gate TIMER 50 μs −100 mV low power PFCTIMER Remark: TEA1752LT time-out is latched. TEA1752T time-out is safe restart. Fig 1. Block diagram TEA1752T_LT Product data sheet TEA1752T; TEA1752LT PFCDRIVER FBDRIVER 12 13 PFC driver PFC gate driver driver ...
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... Pin configuration: TEA1752(L)T (SOT109-1) 6.2 Pin description Table 2. Symbol V CC GND FBCTRL FBAUX LATCH PFCCOMP VINSENSE PFCAUX VOSENSE FBSENSE PFCSENSE PFCDRIVER FBDRIVER PFCTIMER HVS HV TEA1752T_LT Product data sheet TEA1752T; TEA1752LT GND FBCTRL 3 FBAUX 4 TEA1752(L)T 5 LATCH PFCCOMP 6 VINSENSE 7 PFCAUX 8 014aaa741 Pin description Pin Description ...
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... PFCSENSE and FBSENSE are charged and the clamp circuit on pin PFCCOMP is activated. When the LATCH pin voltage exceeds V start capacitor on pin PFCSENSE pin is charged, the PFC circuit is activated. The flyback TEA1752T_LT Product data sheet TEA1752T; TEA1752LT SS1 R SS1 R SENSE1 ...
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... FBCTRL reaches the V assumed. The TEA1752T then initiates a safe restart, while in the TEA1752LT the protection is latched. When one of the protection functions is activated, both converters stop switching and the ...
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... Latch input Pin LATCH is a general purpose input pin, which can be used to switch off both converters. The pin sources a current I converters is stopped as soon as the voltage on this pin drops below 1.25 V. TEA1752T_LT Product data sheet TEA1752T; TEA1752LT soft start soft start ...
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... Zero Current Signal (ZCS), 50 μs (typical), after the last PFCGATE signal valley signal is detected on the PFCAUX pin, the controller generates a valley signal, 4 μs (typical), after demagnetization was detected. TEA1752T_LT Product data sheet TEA1752T; TEA1752LT , does not need to discharge for this latched bus , must discharge for the V bus will not recharge from the HV mains while OTP is active ...
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... V (typical). If the voltage on pin PFCSENSE exceeds 0.5 V, the soft start current source limits current I source is switched off (see Resistor R SS1 switched off by performing a soft stop. TEA1752T_LT Product data sheet TEA1752T; TEA1752LT . If the frequency for quasi-resonant operation is above the f between pin PFCSENSE and the current sense resistor, R SS1 . start(soft)PFC and C SS1 × ...
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... When the flyback controller part leaves the frequency reduction mode, a switch discharges the PFCTIMER pin capacitor. When the voltage on the PCTIMER pin drops below 1.27 V (typical), the PFC is switched on (see TEA1752T_LT Product data sheet TEA1752T; TEA1752LT I start(soft)PFC ≤ 60 μ SS1 11 PFCSENSE C SS1 0 ...
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... Mains undervoltage lockout/brownout protection (VINSENSE pin) To prevent the PFC from operating at very low mains input voltages, the voltage on the VINSENSE pin is continuously monitored. When the voltage on this pin drops below the V stop(VINSENSE) TEA1752T_LT Product data sheet TEA1752T; TEA1752LT 10 μA 3.6 V low power 1. PFCTIMER − ...
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... IC after start-up. 7.3.1 Multimode operation The TEA1752(L)T flyback controller can operate in several modes (see TEA1752T_LT Product data sheet TEA1752T; TEA1752LT + ΔV , for a fast restart when mains input voltage is restored pu(VINSENSE) ovp(VOSENSE) level. This protects the circuit from open-loop th(ol)(VOSENSE) All information provided in this document is subject to legal disclaimers ...
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... FBCTRL pin (see For stable on and off switching of the PFC, hysteresis has been added load operation the switching frequency can be reduced to (almost) zero. TEA1752T_LT Product data sheet TEA1752T; TEA1752LT flyback 125 kHz frequency reduction ...
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... Valley switching allows high frequency operation as capacitive switching losses are reduced (see magnetics possible. ⎛ 1 × ⎝ TEA1752T_LT Product data sheet TEA1752T; TEA1752LT f sw(fb)max flyback switching PFC off PFC on frequency discontinuous frequency reduction 1.5 V Equation 1). High frequency operation makes small and cost-effective ⎞ ...
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... The FBSENSE pin outputs a current of 3 μA (typical). This current runs through resistors R and R S2 SS2 voltage (See can be adjusted. Adjusting the minimum peak current level, will change the frequency reduction slope (See TEA1752T_LT Product data sheet TEA1752T; TEA1752LT primary secondary stroke stroke drain valley secondary stroke oscillator 3) and compared with an internal control voltage ...
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... V (typical), this connection is disabled. Above 2.5 V the pin is biased with a small current. When the voltage on this pin rises above 4.5 V (typical), a fault is assumed and switching is inhibited. In the TEA1752T a restart will then be made, while in the TEA1752LT the protection will be latched. When a small capacitor is connected to this pin, a time-out function can be created to protect against an open control loop situation. (see function can be disabled by connecting a resistor (100 kΩ ...
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... NXP Semiconductors Fig 12. Time-out protection circuit Fig 13. Time-out protection (signals), safe restart in the TEA1752T Fig 14. Time-out protection (signals), latched in the TEA1752LT 7.3.6 Soft start-up (pin FBSENSE) To prevent audible transformer noise during start-up, the transformer peak current is slowly increased by the soft start function. This can be achieved by inserting a resistor ...
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... OVP events are detected, the IC assumes a true OVP and the OVP circuit switches the power MOSFET off. As the protection is latched, the converter only restarts after the internal latch is reset typical application the mains should be interrupted to reset the internal latch. TEA1752T_LT Product data sheet TEA1752T; TEA1752LT × × ...
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... This information is used to adjust the peak drain current of the flyback converter measured via pin FBSENSE. The internal compensation is such that an almost input voltage independent maximum output power can be realized. The OPP curve is given in TEA1752T_LT Product data sheet TEA1752T; TEA1752LT at which the OVP function trips, can be set by the o(OVP) : FBAUX × ...
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... V HV Currents I FBCTRL I FBAUX I PFCSENSE I FBSENSE I FBDRIVER TEA1752T_LT Product data sheet TEA1752T; TEA1752LT −360 I (μA) FBAUX Limiting values Parameter Conditions supply voltage voltage on pin LATCH current limited voltage on pin FBCTRL voltage on pin PFCCOMP voltage on pin VINSENSE voltage on pin VOSENSE voltage on pin PFCAUX ...
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... Start-up current source (pin HV) I current on pin breakdown voltage BR Supply voltage management (pin V V trip voltage trip TEA1752T_LT Product data sheet TEA1752T; TEA1752LT Limiting values …continued Parameter Conditions current on pin PFCDRIVER duty cycle < current on pin HV < 75 °C total power dissipation T amb storage temperature ...
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... PFCCOMP V clamp voltage on pin clamp(PFCCOMP) PFCCOMP V zero on-time voltage on pin ton(PFCCOMP)zero PFCCOMP V maximum on-time voltage on ton(PFCCOMP)max pin PFCCOMP TEA1752T_LT Product data sheet TEA1752T; TEA1752LT Conditions during start-up phase − startup th(UVLO) V > < trip V < V < V ...
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... PFC valley recognition time-out to(vrec)PFC time Demagnetization management PFC (pin PFCAUX) V comparator threshold voltage th(comp)PFCAUX on pin PFCAUX t PFC demagnetization time-out to(demag)PFC time TEA1752T_LT Product data sheet TEA1752T; TEA1752LT Conditions V = 3.3 V; VINSENSE PFCCOMP ton(PFCCOMP)max V = 0.9 V; VINSENSE PFCCOMP ton(PFCCOMP)max for I ...
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... VCO start voltage on pin start(VCO)FBCTRL FBCTRL f PFC switch-on flyback sw(fb)swon(PFC) switching frequency f PFC switch-off flyback sw(fb)swoff(PFC) switching frequency ΔV VCO voltage difference on pin VCO(FBCTRL) FBCTRL TEA1752T_LT Product data sheet TEA1752T; TEA1752LT Conditions PFCAUX PFCDRIVER PFCDRIVER PFCDRIVER FBAUX = − ...
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... Driver (pin FBDRIVER) I source current on pin src(FBDRIVER) FBDRIVER I sink current on pin FBDRIVER V sink(FBDRIVER) V maximum output voltage on pin O(FBDRIVER)(max) FBDRIVER TEA1752T_LT Product data sheet TEA1752T; TEA1752LT Conditions for maximum flyback peak current enable voltage trip voltage FBCTRL FBCTRL V = 2.6 V FBCTRL ...
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... For a typical application with a compensation network on pin PFCCOMP (see [2] Minimum required voltage change time for valley recognition on pin PFCAUX. Minimum time required between demagnetization detection and ΔV/Δ pin PFCAUX. [3] [4] Guaranteed by design. TEA1752T_LT Product data sheet TEA1752T; TEA1752LT Conditions V < V < V prot(LATCH) LATCH oc(LATCH) at start-up − ...
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... due to negative voltage spikes across the sense resistors. Resistor R AUX1 TEA1752T_LT Product data sheet TEA1752T; TEA1752LT Figure 18). buffers the IC supply voltage, which is powered via the high voltage VCC and R SENSE1 define the maximum primary peak current on MOSFETs S1 and S2. ...
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... NXP Semiconductors R AUX1 PFCDRIVER 12 PFCAUX 8 PFCCOMP 6 compensation VINSENSE 7 FBCTRL 3 R LOOP C TIMEOUT Fig 18. Typical application diagram TEA1752(L)T TEA1752T_LT Product data sheet TEA1752T; TEA1752LT SS1 R SS1 R SENSE1 R S1 PFCSENSE VOSENSE HV FBTIMER TEA1752(L GND PFCTIMER All information provided in this document is subject to legal disclaimers. ...
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... Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION IEC SOT109-1 076E07 Fig 19. Package outline SOT109-1 (SO16) TEA1752T_LT Product data sheet TEA1752T; TEA1752LT 2 scale (1) ...
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... Text and drawings updated throughout entire data sheet. • Figure 1 • V stop(soft)PFC • Minimum junction temperature changed in TEA1752T_LT_1 20090213 TEA1752T_LT Product data sheet TEA1752T; TEA1752LT Data sheet status Change notice Product data sheet - updated. added in Table 5. Table Objective data sheet - All information provided in this document is subject to legal disclaimers. ...
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... TEA1752T_LT Product data sheet TEA1752T; TEA1752LT [3] Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. ...
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... For sales office addresses, please send an email to: TEA1752T_LT Product data sheet TEA1752T; TEA1752LT own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: TEA1752T_LT All rights reserved. Date of release: 24 June 2010 ...