74avc4t245d NXP Semiconductors, 74avc4t245d Datasheet
74avc4t245d
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74avc4t245d Summary of contents
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Rev. 01 — 20 July 2009 1. General description The 74AVC4T245 is an 4-bit, dual supply transceiver that enables bidirectional level translation. The device can be used as two ...
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... Inputs accept voltages OFF I Multiple package options I Specified from +85 C and +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74AVC4T245D +125 C 74AVC4T245PW +125 C 74AVC4T245BQ +125 C 4. Functional diagram V CC(A) 1OE 15 1DIR 2 Fig 1. ...
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... NXP Semiconductors Fig 2. Logic diagram (one 2-bit transceiver) 5. Pinning information 5.1 Pinning Fig 3. Pin configuration SOT109-1 (SO16) 74AVC4T245_1 Product data sheet 4-bit dual supply translating transceiver; 3-state DIR CC(A) CC(B) 001aak281 74AVC4T245 CC(A) CC(B) 1DIR 2 15 1OE 2DIR 3 14 2OE 4 13 ...
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... NXP Semiconductors 74AVC4T245 1 V CC(A) 1DIR 2 2DIR 3 1A1 4 5 1A2 2A1 6 2A2 7 8 GND Fig 4. Pin configuration SOT403-1 (TSSOP16) 5.2 Pin description Table 2. Pin description Symbol Pin V 1 CC(A) 1DIR, 2DIR 2, 3 1A1, 1A2 4, 5 2A1, 2A2 6, 7 [1] GND 8, 9 2B2, 2B1 10, 11 ...
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... NXP Semiconductors 6. Functional description [1] Table 3. Function table Supply voltage Input [ nOE CC(A) CC( [3] GND X [ HIGH voltage level LOW voltage level don’t care high-impedance OFF-state. [2] The nAn, nDIR and nOE input circuit is referenced least one of V ...
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... NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage A CC(A) V supply voltage B CC(B) V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate [ the supply voltage associated with the output port. ...
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... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V HIGH-level data input IH input voltage V CCI V CCI V CCI V CCI nDIR, nOE input V CC(A) V CC(A) V CC(A) V CC(A) V LOW-level data input IL input voltage V CCI V CCI V CCI V CCI nDIR, nOE input ...
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... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V LOW-level output voltage I = 100 CC( mA CC( mA CC( mA CC( mA CC( mA CC(A) I input leakage nDIR, nOE input; V ...
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... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I supply current A port CC(A) V CC(B) V CC(A) V CC(B) V CC(A) V CC(A) B port CC(A) V CC(B) V CC(A) V CC(B) V CC(A) V CC(A) A plus B port ( CC(A) V CC(B) A plus B port ( CC(A) V CC(B) ...
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... NXP Semiconductors 10. Dynamic characteristics Table 9. Typical power dissipation capacitance at V Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions C power dissipation A port: (direction nAn to PD capacitance nBn); output enabled A port: (direction nAn to nBn); output disabled A port: (direction nBn to nAn); output enabled A port: (direction nBn to nAn) ...
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... NXP Semiconductors Table 10. Typical dynamic characteristics at V Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t propagation delay nAn to nBn pd nBn to nAn t disable time nOE to nAn dis nOE to nBn t enable time nOE to nAn en nOE to nBn [ the same as t and t ...
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... NXP Semiconductors Table 12. Dynamic characteristics for temperature range +85 C Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions 1.3 V CC(A) t propagation nAn to nBn pd delay nBn to nAn t disable time nOE to nAn dis nOE to nBn t enable time nOE to nAn ...
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... NXP Semiconductors Table 13. Dynamic characteristics for temperature range +125 C Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions 1.3 V CC(A) t propagation nAn to nBn pd delay nBn to nAn t disable time nOE to nAn dis nOE to nBn t enable time nOE to nAn ...
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... NXP Semiconductors 11. Waveforms Measurement points are given in V and V are typical output voltage levels that occur with the output load Fig 6. The data input (nAn, nBn) to output (nBn, nAn) propagation delay times nOE input output LOW-to-OFF OFF-to-LOW output ...
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... NXP Semiconductors Test data is given in Table R = Load resistance Load capacitance including jig and probe capacitance Termination resistance External voltage for measuring switching times. EXT Fig 8. Load circuit for switching times Table 15. Test data Supply voltage Input [ CC(A) ...
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... NXP Semiconductors 12. Typical propagation delay characteristics (ns Propagation delay (A to B 0.8 V. CC(B) ( 1.2 V. CC(B) ( 1.5 V. CC(B) ( 1.8 V. CC(B) ( 2.5 V. CC(B) ( 3.3 V. CC(B) Fig 9. Typical propagation delay versus load capacitance; T 74AVC4T245_1 Product data sheet 4-bit dual supply translating transceiver; 3-state ...
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... NXP Semiconductors 7 t PLH (ns LOW to HIGH propagation delay ( 1.2 V CC( PLH (ns LOW to HIGH propagation delay ( 1.5 V CC(A) ( 1.2 V. CC(B) ( 1.5 V. CC(B) ( 1.8 V. CC(B) ( 2.5 V. CC(B) ( 3.3 V. CC(B) Fig 10. Typical propagation delay versus load capacitance; T 74AVC4T245_1 Product data sheet 4-bit dual supply translating transceiver ...
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... NXP Semiconductors 7 t PLH (ns LOW to HIGH propagation delay ( 1.8 V CC( PLH (ns LOW to HIGH propagation delay ( 2.5 V CC(A) ( 1.2 V. CC(B) ( 1.5 V. CC(B) ( 1.8 V. CC(B) ( 2.5 V. CC(B) ( 3.3 V. CC(B) Fig 11. Typical propagation delay versus load capacitance; T 74AVC4T245_1 Product data sheet 4-bit dual supply translating transceiver ...
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... NXP Semiconductors 7 t PLH (ns LOW to HIGH propagation delay ( 3.3 V CC(A) ( 1.2 V. CC(B) ( 1.5 V. CC(B) ( 1.8 V. CC(B) ( 2.5 V. CC(B) ( 3.3 V. CC(B) Fig 12. Typical propagation delay versus load capacitance; T 74AVC4T245_1 Product data sheet 4-bit dual supply translating transceiver; 3-state 001aai485 t PHL (1) (ns) ...
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... NXP Semiconductors 13. Package outline SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 14. Abbreviations Table 16. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 15. Revision history Table 17. Revision history Document ID Release date 74AVC4T245_1 20090720 74AVC4T245_1 Product data sheet 4-bit dual supply translating transceiver ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 5 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . 10 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 12 Typical propagation delay characteristics Package outline ...