nvt2001 NXP Semiconductors, nvt2001 Datasheet

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nvt2001

Manufacturer Part Number
nvt2001
Description
Bidirectional Voltage Level Translator For Open-drain And Push-pull Applications
Manufacturer
NXP Semiconductors
Datasheet

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1. General description
2. Features and benefits
The NVT2001/02 are bidirectional voltage level translators operational from 1.0 V to 3.6 V
(V
1.0 V and 5 V without the need for a direction pin in open-drain or push-pull applications.
Bit widths ranging from 1-bit or 2-bit are offered for level translation application with
transmission speeds < 33 MHz for an open-drain system with a 50 pF capacitance and a
pull-up of 197 Ω.
When the An or Bn port is LOW, the clamp is in the ON-state and a low resistance
connection exists between the An and Bn ports. The low ON-state resistance (R
switch allows connections to be made with minimal propagation delay. Assuming the
higher voltage is on the Bn port when the Bn port is HIGH, the voltage on the An port is
limited to the voltage set by VREFA. When the An port is HIGH, the Bn port is pulled to the
drain pull-up supply voltage (V
seamless translation between higher and lower voltages selected by the user without the
need for directional control.
When EN is HIGH, the translator switch is on, and the An I/O are connected to the Bn I/O,
respectively, allowing bidirectional data flow between ports. When EN is LOW, the
translator switch is off, and a high-impedance state exists between ports. The EN input
circuit is designed to be supplied by V
power-up or power-down, EN must be LOW.
All channels have the same electrical characteristics and there is minimal deviation from
one output to another in voltage or propagation delay. This is a benefit over discrete
transistor voltage translation solutions, since the fabrication of the switch is symmetrical.
The translator provides excellent ESD protection to lower voltage devices, and at the
same time protects less ESD-resistant devices.
ref(A)
NVT2001; NVT2002
Bidirectional voltage level translator for open-drain and
push-pull applications
Rev. 1 — 30 August 2010
Provides bidirectional voltage translation with no direction pin
Less than 1.5 ns maximum propagation delay
Allows voltage level translation between:
) and 1.8 V to 5.5 V (V
1.0 V V
1.2 V V
1.8 V V
2.5 V V
3.3 V V
ref(A)
ref(A)
ref(A)
ref(A)
ref(A)
and 1.8 V, 2.5 V, 3.3 V or 5 V V
and 1.8 V, 2.5 V, 3.3 V or 5 V V
and 3.3 V or 5 V V
and 5 V V
and 5 V V
ref(B)
ref(B)
ref(B)
pu(D)
), which allow bidirectional voltage translations between
) by the pull-up resistors. This functionality allows a
ref(B)
ref(B)
. To ensure the high-impedance state during
ref(B)
ref(B)
Product data sheet
on
) of the

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nvt2001 Summary of contents

Page 1

... Bidirectional voltage level translator for open-drain and push-pull applications Rev. 1 — 30 August 2010 1. General description The NVT2001/02 are bidirectional voltage level translators operational from 1 3 and 1 5 ref(A) 1.0 V and 5 V without the need for a direction pin in open-drain or push-pull applications. ...

Page 2

... UTLP based; body 1.35 × 1.7 × 0.5 mm VREFA A1 An Logic diagram of NVT2001; NVT2002 (positive logic) All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator VREFB ...

Page 3

... VREFA 2 7 VREFB 002aae217 Transparent top view Pin configuration for HXSON8U All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator NVT2001GM VREFB 002aae211 GND 1 VREFA 2 ...

Page 4

... NXP Semiconductors Fig 7. 5.2 Pin description Table 2. Symbol GND VREFA VREFB EN [1] 1-bit NVT2001 available in XSON6 package. [2] 2-bit NVT2002 available in TSSOP8, VSSOP8, XSON8, HXSON8, XQFN8U packages. NVT2001_NVT2002 Product data sheet terminal 1 index area GND 1 VREFA Transparent top view Pin configuration for XQFN8U ...

Page 5

... The NVT2001/02 can be used in level translation applications for interfacing devices or systems operating at different interface voltages with one another. The NVT2001/02 is ideal for use in applications where an open-drain driver is connected to the data I/Os. The NVT2001/02 can also be used in applications where a push-pull driver is connected to the data I/Os. 7.1 Enable and disable The NVT20xx has an EN input that is used to disable the device by setting EN LOW, which places all I/Os in the high-impedance state ...

Page 6

... V higher than V ref(B) the capacitor and the 200 kΩ resistor on the EN pin. Typical application circuit (switch enable control) All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator [1] Min Typ ...

Page 7

... However, if either output is totem-pole, data must be unidirectional or pu( connected to the processor core power supply ref(A) is set between 1.0 V and (V ref(A) . pu(D) All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator 200 kΩ EN VREFB B1 CHIPSET I CHIPSET I/O ...

Page 8

... Pull-up resistor value (Ω [1] Nominal +10 % Nominal 310 197 143 All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator 10 mA [1] [1] +10 % Nominal +10 % 341 465 512 217 295 325 158 215 ...

Page 9

... All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator Conditions Min Max −0.5 +6 −0.5 +6 −0.5 ...

Page 10

... I(EN) An, Bn 4.5 V I( 4.5 V I(EN) behavior. I(EN) All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator Conditions Min An VREFA 0 VREFB −40 operating in free-air [1] Min Typ - - - ...

Page 11

... T (°C) amb 002aaf315 R on(typ) (Ω 100 T (°C) amb = 3.0 V I(EN) All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator −40 − I(EN ...

Page 12

... VREFA 1.5 V 002aaf347 Fig 13. Example of typical AC waveform (open 002aab845 All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator Ω μ = 200 0.1 bias(ext) VREFB Conditions Min × (C [1] from (input) Bn ...

Page 13

... I( I(EN All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator × × 5 Ω = 0.250 ns. on L(tot) , which is typically small addition. on 002aaf349 ...

Page 14

... 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA MO-252 All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator 4× ( EUROPEAN PROJECTION SOT886 ISSUE DATE 04-07-15 04-07-22 © NXP B.V. 2010. All rights reserved ...

Page 15

... 2.5 scale (1) ( 0.45 0.28 3.1 3.1 0.65 0.25 0.15 2.9 2.9 REFERENCES JEDEC JEITA All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator θ detail 5.1 0.7 0.94 0.1 0.1 0.1 4.7 0.4 ...

Page 16

... 3.1 0.5 0.15 0.6 0.5 1.5 2.9 0.3 0.4 0.05 REFERENCES JEDEC JEITA - - - All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator detail 0.1 0.05 0.05 0.1 EUROPEAN PROJECTION SOT996-2 ISSUE DATE 07-12-18 07-12-21 © ...

Page 17

... 1.5 1.4 0.5 0.35 0.4 1.2 1.3 1.3 0.3 0.15 REFERENCES JEDEC JEITA - - - All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator detail 0.09 0.1 0.05 0.05 0.1 0.00 EUROPEAN PROJECTION SOT983-1 y ISSUE DATE ...

Page 18

... References JEDEC JEITA MO-252 All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator detail X (2) (8× European projection © NXP B.V. 2010. All rights reserved. SOT1089 sot1089_po Issue date 10-04-09 10-04- ...

Page 19

... 1.65 0.35 0.15 0.55 0.5 0.1 1.55 0.25 0.05 REFERENCES JEDEC JEITA MO-255 - - - All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator detail 0.05 0.05 0.05 EUROPEAN PROJECTION SOT902 ISSUE DATE ...

Page 20

... Solder bath specifications, including temperature and impurities NVT2001_NVT2002 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator © NXP B.V. 2010. All rights reserved ...

Page 21

... Package reflow temperature (°C) 3 Volume (mm ) < 350 260 260 250 Figure 22. All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator Figure 22) than a SnPb process, thus ≥ 350 220 220 350 to 2000 > 2000 260 260 250 ...

Page 22

... MSL: Moisture Sensitivity Level 0.15 0.25 (8×) (8×) 0.5 (8×) 0.6 (8×) 0.35 (3×) 1.4 All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator peak temperature time 001aac844 0.7 1.4 © NXP B.V. 2010. All rights reserved. SOT1089 sot1089_fr ...

Page 23

... I C-bus I/O LVTTL MM PRR RC 17. Revision history Table 13. Revision history Document ID Release date NVT2001_NVT2002 v.1 20100830 NVT2001_NVT2002 Product data sheet Abbreviations Description Charged Device Model ElectroStatic Discharge Gunning Transceiver Logic Human Body Model Inter-Integrated Circuit bus Input/Output Low Voltage Transistor-Transistor Logic Machine Model ...

Page 24

... Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator © NXP B.V. 2010. All rights reserved ...

Page 25

... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 1 — 30 August 2010 NVT2001; NVT2002 Bidirectional voltage level translator © NXP B.V. 2010. All rights reserved ...

Page 26

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: NVT2001_NVT2002 All rights reserved. Date of release: 30 August 2010 ...

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