m95080 STMicroelectronics, m95080 Datasheet
m95080
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m95080 Summary of contents
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... Reference M95160 M95160 M95160-W M95160-R M95080 M95080 M95080-W M95080-R March 2008 16 Kbit and 8 Kbit serial SPI bus EEPROM Part number Rev 7 M95160 M95080 with high speed clock SO8 (MN) 150 mil width TSSOP8 (DW) 169 mil width UFDFPN8 (MB (MLP) 1/45 www.st.com 1 ...
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... Active Power and Standby Power modes . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3 Hold condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.4 Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.5 Data protection and protocol control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5 Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6.1 Write Enable (WREN 6.2 Write Disable (WRDI 6.3 Read Status Register (RDSR 6.3.1 2/ Operating supply voltage Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 WIP bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 M95160, M95080 ...
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... M95160, M95080 6.3.2 6.3.3 6.3.4 6.4 Write Status Register (WRSR 6.5 Read from Memory Array (READ 6.6 Write to Memory Array (WRITE Delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 7.1 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 11 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 WEL bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 BP1, BP0 bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 SRWD bit ...
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... AC characteristics (M95160-W and M95080-W, device grade 3 Table 22. AC characteristics (M95160-W and M95080-W, device grade 6 Table 23. AC characteristics (M95160-R and M95080- Table 24. SO8N – 8 lead plastic small outline, 150 mils body width, mechanical data . . . . . . . . . . . 38 Table 25. UFDFPN8 (MLP8) 8-lead ultra thin fine pitch dual flat package no lead mm, package mechanical data ...
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... M95160, M95080 List of figures Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 2. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. 8-pin package connections (top view Figure 4. Bus master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 5. SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 6. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 7. Write Enable (WREN) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 8. Write Disable (WRDI) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 9 ...
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... Description 1 Description The M95160, M95160-W, M95160-R, M95080, M95080-W and M95080-R are electrically erasable programmable memory (EEPROM) devices. They are accessed by a high-speed SPI-compatible bus. The memory array is organized as 2048 x 8 bit (M95160), and 1024 x 8 bit (M95080). The device is accessed by a simple serial interface that is SPI-compatible. The bus signals are C, D and Q, as shown in The device is selected when Chip Select (S) is taken low ...
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... M95160, M95080 Figure 3. 8-pin package connections (top view) 1. See Package mechanical data M95xxx HOLD AI01790D section for package dimensions, and how to identify pin-1. Description 7/45 ...
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... During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data Input (D) and Serial Clock (C) are Don’t Care. To start the Hold condition, the device must be selected, with Chip Select (S) driven low. 8/45 must be held stable and within the specified valid range: CC Table 13. to Table 18.). These signals are described next. M95160, M95080 , IH ...
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... M95160, M95080 2.6 Write Protect (W) The main purpose of this input signal is to freeze the size of the area of memory that is protected against Write instructions (as specified by the values in the BP1 and BP0 bits of the Status Register). This pin must be driven either high or low, and must be stable during all write instructions. ...
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... SDI SCK SPI Memory R R Device S W HOLD Figure 4) ensures that a device is not selected if the requirement is met. The typical value 100 k . SHCH M95160, M95080 SPI Memory SPI Memory R Device Device HOLD W V ...
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... M95160, M95080 3.1 SPI modes These devices can be driven by a microcontroller with its SPI peripheral running in either of the two following modes: ● CPOL=0, CPHA=0 ● CPOL=1, CPHA=1 For these two modes, input data is latched in on the rising edge of Serial Clock (C), and output data is available from the falling edge of Serial Clock (C). ...
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... CC 12/ (min), V (max)] range must be applied (see CC CC rises continuously from V CC has reached the power on reset threshold voltage (this threshold is CC operating voltage defined in CC M95160, M95080 CC Table 9, Table During this SS CC voltage via a suitable pull-up resistor (see ...
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... M95160, M95080 4.1.4 Power-down During power-down (continuous decrease of V voltage), the device must be: ● deselected (Chip Select S should be allowed to follow the voltage applied on V ● in Standby Power mode (there should not be any internal Write cycle in progress). 4.2 Active Power and Standby Power modes When Chip Select (S) is low, the device is selected, and in the Active Power mode ...
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... Write-protected block size Status Register bits BP1 BP0 14/45 Protected array addresses Protected block M95160 none none Upper quarter 0600h - 07FFh Upper half 0400h - 07FFh Whole memory 0000h - 07FFh M95160, M95080 M95080 none 0300h - 03FFh 0200h - 03FFh 0000h - 03FFh ...
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... M95160, M95080 5 Memory organization The memory is organized as shown in Figure 6. Block diagram HOLD Address register Figure 6. High voltage Control logic generator I/O shift register and counter Memory organization Data register Status Register 1 page X decoder Size of the read-only EEPROM area AI01272d 15/45 ...
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... Write to Memory Array 7., to send this instruction to the device, Chip Select (S) is driven low Instruction D High Impedance Q M95160, M95080 Table 4. Table 4.), the device automatically Instruction format 0000 0110 0000 0100 0000 0101 0000 0001 0000 0011 0000 0010 5 6 ...
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... M95160, M95080 6.2 Write Disable (WRDI) One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction to the device. As shown in Figure and the bits of the instruction byte are shifted in, on Serial Data Input (D). The device then enters a wait state. It waits for a the device to be deselected, by Chip Select (S) being driven high ...
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... Write Status Register (WRSR) instruction is no longer accepted for execution. Table 5. Status Register format b7 SRWD Status Register Write Protect 18/45 Table 5.) becomes protected against Write M95160, M95080 Figure 9. BP1 BP0 WEL Block Protect Bits Write Enable Latch Bit Write In Progress Bit b0 WIP ...
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... M95160, M95080 Figure 9. Read Status Register (RDSR) sequence High Impedance Instruction Status Register Out MSB Status Register Out MSB Instructions 0 7 AI02031E 19/45 ...
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... Write Status Register (WRSR) instruction. The new, updated, values take effect at the moment of completion of the execution of Write Status Register (WRSR) instruction. 20/45 Table 22 and Table 23), at the end of which the Write in Progress (WIP) Table 5. M95160, M95080 (as specified in Table 19, W Figure 10 initiated. W ...
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... M95160, M95080 Table 6. Protection modes W SRWD signal Bit defined by the values in the Block Protect (BP1, BP0) bits of the Status Register, as shown in The protection features of the device are summarized in When the Status Register Write Disable (SRWD) bit of the Status Register is 0 (its initial ...
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... Instructions Table 7. Address range bits Device Address bits 1. b15 to b11 are Don’t Care on the M95160. b15 to b10 are Don’t Care on the M95080. Figure 10. Write Status Register (WRSR) sequence 22/45 (1) M95160 A10- ...
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... M95160, M95080 6.5 Read from Memory Array (READ) As shown in Figure low. The bits of the instruction byte and address bytes are then shifted in, on Serial Data Input (D). The address is loaded into an internal address register, and the byte of data at that address is shifted out, on Serial Data Output (Q). ...
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... Chip Select (S) is driven high after the eighth bit of the data byte Instruction 16-Bit Address High Impedance Table 7., the most significant address bits are Don’t Care. M95160, M95080 Figure 13., the next byte Data Byte ...
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... M95160, M95080 Figure 13. Page Write (WRITE) sequence Depending on the memory size, as shown Instruction 16-Bit Address Data Byte 2 Data Byte ...
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... Compliant with JEDEC Std J-STD-020C (for small body, Sn- assembly), the ST ECOPACK 7191395 specification, and the European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU 2. AEC-Q100-002 (compliant with JEDEC Std JESD22-A114, C1=100 pF, R1=1500 , R2=500 ) 26/45 Table 8. may cause permanent damage to Parameter (2) M95160, M95080 Min. Max. Unit –40 130 °C –65 150 ° ...
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... Ambient operating temperature (device grade 3) Table 10. Operating conditions (M95160-W and M95080-W) Symbol V Supply voltage CC Ambient operating temperature (device grade Ambient operating temperature (device grade 3) Table 11. Operating conditions (M95160-R and M95080-R) Symbol V Supply voltage CC T Ambient operating temperature A Table 12. AC measurement conditions Symbol C ...
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... MHz open mA –2 mA M95160, M95080 Min. Max device grade 3) Min. Max. ± ± MHz –0. 0.4 ...
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... I CC1 (Standby) V Input low voltage IL V Input high voltage IH V Output low voltage OL V Output high voltage I OH Table 17. DC characteristics (M95160-W and M95080-W, device grade 6) Symbol Parameter Input leakage I LI current Output leakage I LO current I Supply current CC Supply current I CC1 ...
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... DC and AC parameters Table 18. DC characteristics (M95160-R and M95080-R) Symbol Parameter Input leakage I LI current Output leakage I LO current Supply current I CCR (Read) Supply current I CC1 (Standby) V Input low voltage IL V Input high voltage IH V Output low voltage OL V Output high voltage ...
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... M95160, M95080 Table 19. AC characteristics (M95160 and Symbol SLCH CSS1 t t SHCH CSS2 t SHSL t t CHSH t CHSL ( (1 (2) t CLCH (2) t CHCL t t DVCH t CHDX t HHCH t HLCH t CLHL t CLHH (2) t SHQZ t CLQV t CLQX (2) t QLQH (2) t QHQL ...
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... Clock low set-up time before HOLD not active Output disable time Clock low to output valid Output hold time Output rise time Output fall time HOLD high to output valid HOLD low to output high-Z Write Time M95160, M95080 , device grade 6) and Table 9. Min. Max. D. ...
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... M95160, M95080 Table 21. AC characteristics (M95160-W and M95080-W, device grade 3) Symbol Alt SCK t t SLCH CSS1 t t SHCH CSS2 t t SHSL CHSH CSH t CHSL ( CLH ( CLL ( CLCH RC ( CHCL DVCH DSU t t CHDX ...
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... DC and AC parameters Table 22. AC characteristics (M95160-W and M95080-W, device grade 6) Symbol Alt SCK t t SLCH CSS1 t t SHCH CSS2 t t SHSL CHSH CSH t CHSL ( CLH ( CLL ( CLCH RC ( CHCL DVCH DSU t t CHDX ...
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... M95160, M95080 Table 23. AC characteristics (M95160-R and M95080-R) Symbol Alt Clock frequency C SCK active setup time SLCH CSS1 not active setup time SHCH CSS2 deselect time SHSL active hold time CHSH CSH t S not active hold time ...
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... DC and AC parameters Figure 15. Serial input timing S tCHSL C tDVCH D Q Figure 16. Hold timing HOLD 36/45 tSLCH tCHDX tCLCH MSB IN High Impedance tHLCH tCLHL tHLQZ M95160, M95080 tSHSL tCHSH tSHCH tCHCL LSB IN AI01447C tHHCH tCLHH tHHQV AI01448B ...
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... M95160, M95080 Figure 17. Output timing S C tCLQV tCLQX tCLQX Q ADDR.LSB IN D tCH tCLQV tQLQH tQHQL DC and AC parameters tCL tSHQZ LSB OUT AI01449e 37/45 ...
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... millimeters Typ Min Max 1.75 0.1 0.25 1.25 0.28 0.48 0.17 0.23 0.1 4.9 4 5.8 6.2 3.9 3 0.25 0.5 0° 8° 0.4 1.27 1.04 M95160, M95080 h x 45˚ c 0.25 mm GAUGE PLANE SO-A (1) inches Typ Min 0.0039 0.0492 0.011 0.0067 0.1929 0.189 0.2362 0.2283 0.1535 0.1496 0.05 - 0.0098 0° 0.0157 0.0409 ® Max 0.0689 0.0098 0.0189 0.0091 ...
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... M95160, M95080 Figure 19. UFDFPN8 (MLP8) 8-lead ultra thin fine pitch dual flat package no lead mm, package outline 1. Drawing is not to scale. 2. The central pad (the area the above illustration) is internally pulled to V connected to any other voltage or signal line on the PCB, for example during the soldering process. ...
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... Typ Min Max 1.2 0.05 0.15 1 0.8 1.05 0.19 0.3 0.09 0.2 0.1 3 2.9 3.1 0. 6.4 6.2 6.6 4.4 4.3 4.5 0.6 0.45 0.75 1 0° 8° 8 M95160, M95080 TSSOP8AM (1) inches Typ Min Max 0.0472 0.002 0.0059 0.0394 0.0315 0.0413 0.0075 0.0118 0.0035 0.0079 0.0039 0.1181 0.1142 0.122 0.0256 - - 0.252 0.2441 0.2598 0.1732 0.1693 0.1772 0.0236 0.0177 ...
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... M95160, M95080 11 Part numbering Table 27. Ordering information scheme Example: Device type M95 = SPI serial access EEPROM Device function 160 = 16 Kbit (2048 x 8) 080 = 8 Kbit (1024 x 8) Operating voltage blank = V = 4 2 1 Package MN = SO8 (150 mil width) ...
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... Part numbering Table 28. Available M95160 products (package, voltage range, temperature grade) Package SO8 (MN) TSSOP (DW) MLP (MB Not available Table 29. Available M95080 products (package, voltage range, temperature grade) Package SO8 (MN) TSSOP (DW) MLP 2x3mm (MB Not available 42/45 M95160 M95160-W 4 5 5.5 V ...
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... M95160, M95080 12 Revision history Table 30. Document revision history Date Revision 19-Jul-2001 06-Feb-2002 18-Oct-2002 04-Nov-2002 13-Nov-2002 21-Nov-2003 08-Jun-2004 07-Oct-2004 21-Sep-2005 1.0 Document written from previous M95640/320/160/080 datasheet Announcement made of planned upgrade to 10MHz clock for the 5V, –40 1.1 to 85°C, range 1.2 TSSOP8 (3x3mm body size, MSOP8) package added 1 ...
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... Command termination specified in (WRSR). Blank process no longer available for M95160, M95080, M95160-W and M95080-W in the device grade 3 range and SB processes no longer available for M95160 and M95080, in the device grade 6 range. L process no longer available for M95160-W and M95080-W in the device grade 6 range. I ...
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... M95160, M95080 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...