cy62127dv30 Cypress Semiconductor Corporation., cy62127dv30 Datasheet - Page 6

• Manufacturer Part Number: cy62127dv30
• Description: 1-mb 64k X 16 Static Ram
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 38-05229 Rev. *H
Switching Waveforms
Read Cycle No. 1 (Address Transition Controlled)
Read Cycle No. 2 (OE Controlled)
Write Cycle No. 1 (WE Controlled)
Notes:
16. Device is continuously selected. OE, CE = V
17. WE is HIGH for Read cycle.
18. Address valid prior to or coincident with CE, BHE, BLE transition LOW.
19. Data I/O is high-impedance if OE = V
20. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
21. During the DON'T CARE period in the DATA I/O waveform, the I/Os are in output state and input signals should not be applied.
DATA OUT
ADDRESS
ADDRESS
DATA I/O
BHE/BLE
CE
WE
OE
DON'T CARE
PREVIOUS DATA VALID
IH
t
SA
.
t
HZOE
[16,17,18]
[14, 15, 19, 20, 21]
IL
, BHE, BLE = V
t
OHA
t
IL
AA
t
AW
.
[16,17]
t
SCE
t
WC
t
BW
t
RC
DATA
t
t
PWE
SD
IN
VALID
t
HA
DATA VALID
t
HD
CY62127DV30
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