m27w256 STMicroelectronics, m27w256 Datasheet - Page 9

no-image

m27w256

Manufacturer Part Number
m27w256
Description
256 Kbit 32kb X 8 Low Voltage Uv Eprom And Otp Eprom
Manufacturer
STMicroelectronics
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
m27w256B-80F6
Manufacturer:
STMicroelectronics
Quantity:
135
Part Number:
m27w256B-80F6
Manufacturer:
ST
0
M27W256
2.4
2.5
2.6
System considerations
Programming
Presto II programming algorithm
devices in the array and connected to the READ line from the system control bus. This
ensures that all deselected memory devices are in their low power standby mode and hat
the output pins are only active when data is desired from a particular memory device.
The power switching characteristics of Advance CMOS EPROMs require careful decoupling
of the devices. The supply current, I
designer: the standby current level, the active current level, and transient current peaks that
are produced by the falling and rising edges of E. The magnitude of this transient current
peaks is dependent on the capacitive and inductive loading of the device at the output. The
associated transient voltage peaks can be suppressed by complying with the two line output
control and by properly selected decoupling capacitors. It is recommended that a 0.1µF
ceramic capacitor be used on every device between V
frequency capacitor of low inherent inductance and should be placed as close to the device
as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used between V
V
connection point. The purpose of the bulk capacitor is to overcome the voltage drop caused
by the inductive effects of PCB traces.
The M27W256 has been designed to be fully compatible with the M27C256B and has the
same electronic signature. As a result the M27W256 can be programmed as the M27C256B
on the same programming equipments applying 12.75V on V
use of the same PRESTO II algorithm. When delivered (and after each erasure for UV
EPROM), all bits of the M27W256 are in the '1' state. Data is introduced by selectively
programming '0's into the desired bit locations. Although only '0's will be programmed, both
'1's and '0's can be present in the data word. The only way to change a '0' to a '1' is by die
exposure to ultraviolet light (UV EPROM). The M27W256 is in the programming mode when
V
applied to 8 bits in parallel to the data output pins. The levels required for the address and
data inputs are TTL. V
Presto II programming algorithm allows to program the whole array with a guaranteed
margin, in a typical time of 3.5 seconds. Programming with Presto II involves the application
of a sequence of 100µs program pulses to each byte until a correct verify occurs (see
Figure
activated in order to guarantee that each cell is programmed with enough margin. No
overprogram pulse is applied since the verify in Margin mode at V
provides necessary margin to each programmed cell.
SS
PP
for every eight devices. The bulk capacitor should be located near the power supply
input is at 12.75V, G is at V
5). During programming and verify operation, a Margin mode circuit is automatically
CC
is specified to be 6.25 V ± 0.25 V.
IH
and E is pulsed to V
CC
, has three segments that are of interest to the system
CC
IL
. The data to be programmed is
and V
PP
SS
and 6.25V on V
CC
. This should be a high
much higher than 3.6V
Device description
CC
by the
CC
and
9/23

Related parts for m27w256