m58lw064c STMicroelectronics, m58lw064c Datasheet - Page 46

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m58lw064c

Manufacturer Part Number
m58lw064c
Description
64 Mbit 4mb X16, Uniform Block, Burst 3v Supply Flash Memory
Manufacturer
STMicroelectronics
Datasheet

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M58LW064C
APPENDIX B. COMMON FLASH INTERFACE - CFI
The Common Flash Interface is a JEDEC ap-
proved, standardized data structure that can be
read from the Flash memory device. It allows a
system software to query the device to determine
various electrical and timing parameters, density
information and functions supported by the mem-
ory. The system can interface easily with the de-
Table 26. Query Structure Overview
Note: 1. Offset 15h defines P which points to the Primary Algorithm Extended Query Address Table.
Table 27. CFI - Query Address and Data Output
Note: 1. Query Data are always presented on DQ7-DQ0. DQ15-DQ8 are set to '0'.
46/61
(SBA+02)h Block Status Register
Offset
P(h)
A(h)
1Bh
00h
01h
10h
27h
2. Offset 19h defines A which points to the Alternate Algorithm Extended Query Address Table.
3. SBA is the Start Base Address for each block.
2. Offset 19h defines A which points to the Alternate Algorithm Extended Query Address Table.
Address A22-A1
(1)
(2)
1Ah
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
CFI Query Identification String
System Interface Information
Device Geometry Definition
Primary Algorithm-specific Extended Query Table
Alternate Algorithm-specific Extended Query Table
(2)
Sub-section Name
51h
52h
59h
Data
01h
00h
31h
00h
00h
00h
00h
00h
"Q"
"R"
"Y"
Query ASCII String 52h; "R"
Primary Vendor:
Command Set and Control Interface ID Code
Primary algorithm extended Query Address Table: P(h)
Alternate Vendor:
Command Set and Control Interface ID Code
Alternate Algorithm Extended Query address Table
51h; "Q"
59h; "Y"
vice, enabling the software to upgrade itself when
necessary.
When the CFI Query Command (RCFI) is issued
the device enters CFI Query mode and the data
structure is read from the memory. Tables 26, 27,
28, 29,
trieve the data.
Manufacturer Code
Device Code
Command set ID and algorithm data offset
Device timing and voltage information
Flash memory layout
Additional information specific to the Primary
Algorithm (optional)
Additional information specific to the Alternate
Algorithm (optional)
Block-related Information
30
and
31
Instruction
show the addresses used to re-
Description

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