m29f800at STMicroelectronics, m29f800at Datasheet - Page 4

• Manufacturer Part Number: m29f800at
• Description: 8 Mbit 1mb X8 Or 512kb X16, Boot Block Single Supply Flash Memory
• Manufacturer: STMicroelectronics

M29F800AT, M29F800AB
Table 3A. M29F800AT Block Addresses
Chip Enable (E). The Chip Enable, E, activates
the memory, allowing Bus Read and Bus Write op-
erations to be performed. When Chip Enable is
High, V
Output Enable (G). The Output Enable, G, con-
trols the Bus Read operation of the memory.
Write Enable (W). The Write Enable, W, controls
the Bus Write operation of the memory’s Com-
mand Interface.
Reset/Block Temporary Unprotect (RP). The Re-
set/Block Temporary Unprotect pin can be used to
apply a Hardware Reset to the memory or to tem-
porarily unprotect all blocks that have been pro-
tected.
A Hardware Reset is achieved by holding Reset/
Block Temporary Unprotect Low, V
t
goes High, V
Read and Bus Write operations after t
t
Output section, Table 14 and Figure 10, Reset/
Temporary Unprotect AC Characteristics for more
details.
Holding RP at V
protected blocks in the memory. Program and
Erase operations on all blocks will be possible.
4/21
PLPX
RHEL
(Kbytes)
Size
16
32
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
8
8
. After Reset/Block Temporary Unprotect
, whichever occurs last. See the Ready/Busy
IH
, all other pins are ignored.
FC000h-FFFFFh
D0000h-DFFFFh
C0000h-CFFFFh
Address Range
FA000h-FBFFFh
E0000h-EFFFF h
B0000h-BFFFF h
A0000h-AFFFF h
F8000h-F9FFFh
F0000h-F7FFFh
90000h-9FFFFh
80000h-8FFFFh
70000h-7FFFFh
60000h-6FFFFh
50000h-5FFFFh
40000h-4FFFFh
30000h-3FFFFh
20000h-2FFFFh
10000h-1FFFFh
00000h-0FFFFh
IH
, the memory will be ready for Bus
ID
(x8)
will temporarily unprotect the
7D000h-7DFFFh
7C000h-7CFFFh
Address Range
7E000h-7FFFFh
78000h-7BFFFh
68000h-6FFFFh
58000h-5FFFFh
48000h-4FFFFh
38000h-3FFFFh
28000h-2FFFFh
18000h-1FFFFh
08000h-0FFFFh
70000h-77FFFh
60000h-67FFFh
50000h-57FFFh
40000h-47FFFh
30000h-37FFFh
20000h-27FFFh
10000h-17FFFh
00000h-07FFFh
IL
, for at least
(x16)
PHEL
or
Table 3B. M29F800AB Block Addresses
The transition from V
t
Ready/Busy Output (RB). The Ready/Busy pin
is an open-drain output that can be used to identify
when the memory array can be read. Ready/Busy
is high-impedance during Read mode, Auto Select
mode and Erase Suspend mode.
After a Hardware Reset, Bus Read and Bus Write
operations cannot begin until Ready/Busy be-
comes high-impedance. See Table 14 and Figure
10, Reset/Temporary Unprotect AC Characteris-
tics.
During Program or Erase operations Ready/Busy
is Low, V
Read/Reset commands or Hardware Resets until
the memory is ready to enter Read mode.
The use of an open-drain output allows the Ready/
Busy pins from several memories to be connected
to a single pull-up resistor. A Low will then indicate
that one, or more, of the memories is busy.
Byte/Word Organization Select (BYTE). The Byte/
Word Organization Select pin is used to switch be-
tween the 8-bit and 16-bit Bus modes of the mem-
ory. When Byte/Word Organization Select is Low,
V
V
PHPHH
(Kbytes)
IL
IH
Size
, the memory is in 8-bit mode, when it is High,
, the memory is in 16-bit mode.
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
32
16
8
8
.
OL
D0000h-DFFFF h
C0000h-CFFFF h
. Ready/Busy will remain Low during
E0000h-EFFFFh
B0000h-BFFFFh
A0000h-AFFFFh
Address Range
F0000h-FFFFFh
90000h-9FFFFh
80000h-8FFFFh
70000h-7FFFFh
60000h-6FFFFh
50000h-5FFFFh
40000h-4FFFFh
30000h-3FFFFh
20000h-2FFFFh
10000h-1FFFFh
08000h-0FFFFh
06000h-07FFFh
04000h-05FFFh
00000h-03FFFh
(x8)
IH
to V
ID
must be slower than
Address Range
78000h-7FFFFh
70000h-77FFFh
68000h-6FFFFh
60000h-67FFFh
58000h-5FFFFh
50000h-57FFFh
48000h-4FFFFh
40000h-47FFFh
38000h-3FFFFh
30000h-37FFFh
28000h-2FFFFh
20000h-27FFFh
18000h-1FFFFh
10000h-17FFFh
08000h-0FFFFh
04000h-07FFFh
03000h-03FFFh
02000h-02FFFh
00000h-01FFFh
(x16)