uaa2068ahl NXP Semiconductors, uaa2068ahl Datasheet - Page 8

• Manufacturer Part Number: uaa2068ahl
• Description: Transmit Chain And Synthesizer With Integrated Vco For Dect
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 1 Mode control; note 1
Notes
1. X = don’t care.
2. PLL blocks are the main divider, reference divider, phase detector and charge pump.
3. A reference signal is needed on pin XTAL for correct operation.
Table 2 Bit allocation; note 1
Notes
1. For normal operation, b15 to b0 need to be programmed.
2. Bit b6 is the MSB of the main divider coefficient.
3. The main divider ratio is equal to 2176 plus the programmed value (see Table 3).
1999 Jun 04
VCO, buffer, doubler, RF switch, TX preamplifier and LO buffer
powered-down
VCO, buffer, doubler, RF switch and TX preamplifier powered-up
LO buffer powered-down
Nominal RF signal at TX output
VCO, buffer, doubler, RF switch and TX preamplifier powered-up
LO buffer powered-down
No RF signal output
VCO, buffer, doubler, RF switch and LO buffer powered-up
TX preamplifier powered-down
Nominal RF signal at LO buffer output
VCO, buffer, doubler, RF switch and LO buffer powered-up
TX preamplifier powered-down
No RF signal output
To power-down PLL blocks; notes 2 and 3
To power-up PLL blocks; notes 2 and 3
All blocks in power-down state; notes 2 and 3
New PLL division ratio is loaded and the PLL blocks are powered-up on
the rising edge of S_EN; note 3
FIRST IN
Transmit chain and synthesizer with
integrated VCO for DECT
b15
0
b14
0
b13
0
b12
BLOCK STATUS
1
b11
0
b10
0
REGISTER BIT ALLOCATION
b9
0
DATA FIELD
b8
0
8
b7
1
b6
(2)
VCO_ON
b5
0
1
1
1
1
1
1
0
1
main divider programming
b4
R_OFF
b3
X
X
X
X
X
1
1
0
0
UAA2068AHL
b2
Product specification
T_EN
X
X
X
X
X
1
0
0
1
b1
(3)
LAST IN
S_EN
0 to 1
b0
X
X
X
X
X
0
1
0