lm75adp NXP Semiconductors, lm75adp Datasheet - Page 7

• Manufacturer Part Number: lm75adp
• Description: Digital Temperature Sensor And Thermal Watchdog
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LM75A_4
Product data sheet
7.4.2 Configuration register
7.4.3 Temperature register
read a register that is different from the one that has been recently read, the pointer byte
must be included. However, a write to the LM75A must always include the pointer byte in
the statement. The bus communication protocols are described in
At power-up, the Pointer value is equal to 0 and the Temp register is selected; users can
then read the Temp data without specifying the pointer byte.
The Configuration register (Conf) is a write/read register and contains an 8-bit
non-complement data byte that is used to configure the device for different operation
conditions.
Table 8.
Legend: * = default value.
The Temperature register (Temp) holds the digital result of temperature measurement or
monitor at the end of each analog-to-digital conversion. This register is read-only and
contains two 8-bit data bytes consisting of one Most Significant Byte (MSByte) and one
Least Significant Byte (LSByte). However, only 11 bits of those two bytes are used to store
the Temp data in 2’s complement format with the resolution of 0.125 C.
bit arrangement of the Temp data in the data bytes.
Table 9.
Bit
B[7:5]
B[4:3]
B2
B1
B0
MSByte
D10
7
D9
6
Symbol
reserved
OS_F_QUE[1:0] R/W
OS_POL
OS_COMP_INT R/W
SHUTDOWN
Conf register
Temp register
Table 8
D8
5
D7
4
shows the bit assignments of this register.
D6
Rev. 04 — 10 July 2007
3
Access Value Description
R/W
R/W
R/W
D5
2
000*
00*
01
10
11
0*
1
0*
1
0*
1
D4
1
Digital temperature sensor and thermal watchdog
D3
reserved for manufacturer’s use; should be kept as
zeroes for normal operation
OS fault queue programming
OS polarity selection
OS operation mode selection
device operation mode selection
0
queue value = 1
queue value = 2
queue value = 4
queue value = 6
OS active LOW
OS active HIGH
OS comparator
OS interrupt
normal
shutdown
LSByte
D2
7
D1
6
D0
5
X
4
Section
X
3
© NXP B.V. 2007. All rights reserved.
Table 9
7.10.
LM75A
X
2
shows the
X
1
7 of 24
X
0